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[InstCombine] Add tests for and/or of range checks (NFC)
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‎llvm/test/Transforms/InstCombine/and-or-icmps.ll

Lines changed: 162 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -580,9 +580,9 @@ define i1 @PR42691_7_logical(i32 %x) {
580580

581581
define i1 @PR42691_8(i32 %x) {
582582
; CHECK-LABEL: @PR42691_8(
583-
; CHECK-NEXT: [[X_OFF:%.*]] = add i32 [[X:%.*]], 2147483647
584-
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X_OFF]], -2147483635
585-
; CHECK-NEXT: ret i1 [[TMP1]]
583+
; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 2147483647
584+
; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], -2147483635
585+
; CHECK-NEXT: ret i1 [[TMP2]]
586586
;
587587
%c1 = icmp slt i32 %x, 14
588588
%c2 = icmp ne i32 %x, -2147483648
@@ -592,9 +592,9 @@ define i1 @PR42691_8(i32 %x) {
592592

593593
define i1 @PR42691_8_logical(i32 %x) {
594594
; CHECK-LABEL: @PR42691_8_logical(
595-
; CHECK-NEXT: [[X_OFF:%.*]] = add i32 [[X:%.*]], 2147483647
596-
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X_OFF]], -2147483635
597-
; CHECK-NEXT: ret i1 [[TMP1]]
595+
; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 2147483647
596+
; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], -2147483635
597+
; CHECK-NEXT: ret i1 [[TMP2]]
598598
;
599599
%c1 = icmp slt i32 %x, 14
600600
%c2 = icmp ne i32 %x, -2147483648
@@ -604,9 +604,9 @@ define i1 @PR42691_8_logical(i32 %x) {
604604

605605
define i1 @PR42691_9(i32 %x) {
606606
; CHECK-LABEL: @PR42691_9(
607-
; CHECK-NEXT: [[X_OFF:%.*]] = add i32 [[X:%.*]], -14
608-
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X_OFF]], 2147483633
609-
; CHECK-NEXT: ret i1 [[TMP1]]
607+
; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -14
608+
; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], 2147483633
609+
; CHECK-NEXT: ret i1 [[TMP2]]
610610
;
611611
%c1 = icmp sgt i32 %x, 13
612612
%c2 = icmp ne i32 %x, 2147483647
@@ -616,9 +616,9 @@ define i1 @PR42691_9(i32 %x) {
616616

617617
define i1 @PR42691_9_logical(i32 %x) {
618618
; CHECK-LABEL: @PR42691_9_logical(
619-
; CHECK-NEXT: [[X_OFF:%.*]] = add i32 [[X:%.*]], -14
620-
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X_OFF]], 2147483633
621-
; CHECK-NEXT: ret i1 [[TMP1]]
619+
; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -14
620+
; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], 2147483633
621+
; CHECK-NEXT: ret i1 [[TMP2]]
622622
;
623623
%c1 = icmp sgt i32 %x, 13
624624
%c2 = icmp ne i32 %x, 2147483647
@@ -628,9 +628,9 @@ define i1 @PR42691_9_logical(i32 %x) {
628628

629629
define i1 @PR42691_10(i32 %x) {
630630
; CHECK-LABEL: @PR42691_10(
631-
; CHECK-NEXT: [[X_OFF:%.*]] = add i32 [[X:%.*]], -14
632-
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X_OFF]], -15
633-
; CHECK-NEXT: ret i1 [[TMP1]]
631+
; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -14
632+
; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], -15
633+
; CHECK-NEXT: ret i1 [[TMP2]]
634634
;
635635
%c1 = icmp ugt i32 %x, 13
636636
%c2 = icmp ne i32 %x, 4294967295
@@ -640,9 +640,9 @@ define i1 @PR42691_10(i32 %x) {
640640

641641
define i1 @PR42691_10_logical(i32 %x) {
642642
; CHECK-LABEL: @PR42691_10_logical(
643-
; CHECK-NEXT: [[X_OFF:%.*]] = add i32 [[X:%.*]], -14
644-
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X_OFF]], -15
645-
; CHECK-NEXT: ret i1 [[TMP1]]
643+
; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -14
644+
; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], -15
645+
; CHECK-NEXT: ret i1 [[TMP2]]
646646
;
647647
%c1 = icmp ugt i32 %x, 13
648648
%c2 = icmp ne i32 %x, 4294967295
@@ -1043,3 +1043,147 @@ define i1 @substitute_constant_or_ne_ule_use2_logical(i8 %x, i8 %y) {
10431043
%r = select i1 %c2, i1 true, i1 %c1
10441044
ret i1 %r
10451045
}
1046+
1047+
define i1 @or_ranges_overlap(i8 %x) {
1048+
; CHECK-LABEL: @or_ranges_overlap(
1049+
; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -5
1050+
; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 6
1051+
; CHECK-NEXT: [[TMP3:%.*]] = add i8 [[X]], -10
1052+
; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i8 [[TMP3]], 11
1053+
; CHECK-NEXT: [[C7:%.*]] = or i1 [[TMP2]], [[TMP4]]
1054+
; CHECK-NEXT: ret i1 [[C7]]
1055+
;
1056+
%c1 = icmp uge i8 %x, 5
1057+
%c2 = icmp ule i8 %x, 10
1058+
%c3 = and i1 %c1, %c2
1059+
%c4 = icmp uge i8 %x, 10
1060+
%c5 = icmp ule i8 %x, 20
1061+
%c6 = and i1 %c4, %c5
1062+
%c7 = or i1 %c3, %c6
1063+
ret i1 %c7
1064+
}
1065+
1066+
define i1 @or_ranges_adjacent(i8 %x) {
1067+
; CHECK-LABEL: @or_ranges_adjacent(
1068+
; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -5
1069+
; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 6
1070+
; CHECK-NEXT: [[TMP3:%.*]] = add i8 [[X]], -11
1071+
; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i8 [[TMP3]], 10
1072+
; CHECK-NEXT: [[C7:%.*]] = or i1 [[TMP2]], [[TMP4]]
1073+
; CHECK-NEXT: ret i1 [[C7]]
1074+
;
1075+
%c1 = icmp uge i8 %x, 5
1076+
%c2 = icmp ule i8 %x, 10
1077+
%c3 = and i1 %c1, %c2
1078+
%c4 = icmp uge i8 %x, 11
1079+
%c5 = icmp ule i8 %x, 20
1080+
%c6 = and i1 %c4, %c5
1081+
%c7 = or i1 %c3, %c6
1082+
ret i1 %c7
1083+
}
1084+
1085+
define i1 @or_ranges_separated(i8 %x) {
1086+
; CHECK-LABEL: @or_ranges_separated(
1087+
; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -5
1088+
; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 6
1089+
; CHECK-NEXT: [[TMP3:%.*]] = add i8 [[X]], -12
1090+
; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i8 [[TMP3]], 9
1091+
; CHECK-NEXT: [[C7:%.*]] = or i1 [[TMP2]], [[TMP4]]
1092+
; CHECK-NEXT: ret i1 [[C7]]
1093+
;
1094+
%c1 = icmp uge i8 %x, 5
1095+
%c2 = icmp ule i8 %x, 10
1096+
%c3 = and i1 %c1, %c2
1097+
%c4 = icmp uge i8 %x, 12
1098+
%c5 = icmp ule i8 %x, 20
1099+
%c6 = and i1 %c4, %c5
1100+
%c7 = or i1 %c3, %c6
1101+
ret i1 %c7
1102+
}
1103+
1104+
define i1 @or_ranges_single_elem_right(i8 %x) {
1105+
; CHECK-LABEL: @or_ranges_single_elem_right(
1106+
; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -5
1107+
; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 7
1108+
; CHECK-NEXT: ret i1 [[TMP2]]
1109+
;
1110+
%c1 = icmp uge i8 %x, 5
1111+
%c2 = icmp ule i8 %x, 10
1112+
%c3 = and i1 %c1, %c2
1113+
%c4 = icmp eq i8 %x, 11
1114+
%c6 = or i1 %c3, %c4
1115+
ret i1 %c6
1116+
}
1117+
1118+
define i1 @or_ranges_single_elem_left(i8 %x) {
1119+
; CHECK-LABEL: @or_ranges_single_elem_left(
1120+
; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -5
1121+
; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 6
1122+
; CHECK-NEXT: [[C4:%.*]] = icmp eq i8 [[X]], 4
1123+
; CHECK-NEXT: [[C6:%.*]] = or i1 [[TMP2]], [[C4]]
1124+
; CHECK-NEXT: ret i1 [[C6]]
1125+
;
1126+
%c1 = icmp uge i8 %x, 5
1127+
%c2 = icmp ule i8 %x, 10
1128+
%c3 = and i1 %c1, %c2
1129+
%c4 = icmp eq i8 %x, 4
1130+
%c6 = or i1 %c3, %c4
1131+
ret i1 %c6
1132+
}
1133+
1134+
define i1 @and_ranges_overlap(i8 %x) {
1135+
; CHECK-LABEL: @and_ranges_overlap(
1136+
; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -5
1137+
; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 6
1138+
; CHECK-NEXT: [[TMP3:%.*]] = add i8 [[X]], -7
1139+
; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i8 [[TMP3]], 14
1140+
; CHECK-NEXT: [[C7:%.*]] = and i1 [[TMP2]], [[TMP4]]
1141+
; CHECK-NEXT: ret i1 [[C7]]
1142+
;
1143+
%c1 = icmp uge i8 %x, 5
1144+
%c2 = icmp ule i8 %x, 10
1145+
%c3 = and i1 %c1, %c2
1146+
%c4 = icmp uge i8 %x, 7
1147+
%c5 = icmp ule i8 %x, 20
1148+
%c6 = and i1 %c4, %c5
1149+
%c7 = and i1 %c3, %c6
1150+
ret i1 %c7
1151+
}
1152+
1153+
define i1 @and_ranges_overlap_single(i8 %x) {
1154+
; CHECK-LABEL: @and_ranges_overlap_single(
1155+
; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -5
1156+
; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 6
1157+
; CHECK-NEXT: [[TMP3:%.*]] = add i8 [[X]], -10
1158+
; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i8 [[TMP3]], 11
1159+
; CHECK-NEXT: [[C7:%.*]] = and i1 [[TMP2]], [[TMP4]]
1160+
; CHECK-NEXT: ret i1 [[C7]]
1161+
;
1162+
%c1 = icmp uge i8 %x, 5
1163+
%c2 = icmp ule i8 %x, 10
1164+
%c3 = and i1 %c1, %c2
1165+
%c4 = icmp uge i8 %x, 10
1166+
%c5 = icmp ule i8 %x, 20
1167+
%c6 = and i1 %c4, %c5
1168+
%c7 = and i1 %c3, %c6
1169+
ret i1 %c7
1170+
}
1171+
1172+
define i1 @and_ranges_no_overlap(i8 %x) {
1173+
; CHECK-LABEL: @and_ranges_no_overlap(
1174+
; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], -5
1175+
; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 6
1176+
; CHECK-NEXT: [[TMP3:%.*]] = add i8 [[X]], -11
1177+
; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i8 [[TMP3]], 10
1178+
; CHECK-NEXT: [[C7:%.*]] = and i1 [[TMP2]], [[TMP4]]
1179+
; CHECK-NEXT: ret i1 [[C7]]
1180+
;
1181+
%c1 = icmp uge i8 %x, 5
1182+
%c2 = icmp ule i8 %x, 10
1183+
%c3 = and i1 %c1, %c2
1184+
%c4 = icmp uge i8 %x, 11
1185+
%c5 = icmp ule i8 %x, 20
1186+
%c6 = and i1 %c4, %c5
1187+
%c7 = and i1 %c3, %c6
1188+
ret i1 %c7
1189+
}

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