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Simon Moll
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[LV][NFC-ish] Allow vector widths over 256 elements
The assertion that vector widths are <= 256 elements was hard wired in the LV code. Eg, VE allows for vectors up to 512 elements. Test again the TTI vector register bit width instead - this is an NFC for non-asserting builds. Reviewed By: fhahn Differential Revision: https://reviews.llvm.org/D91518
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llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5349,8 +5349,9 @@ LoopVectorizationCostModel::computeFeasibleMaxVF(unsigned ConstTripCount) {
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LLVM_DEBUG(dbgs() << "LV: The Widest register safe to use is: "
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<< WidestRegister << " bits.\n");
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assert(MaxVectorSize <= 256 && "Did not expect to pack so many elements"
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" into one vector!");
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assert(MaxVectorSize <= WidestRegister &&
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"Did not expect to pack so many elements"
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" into one vector!");
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if (MaxVectorSize == 0) {
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LLVM_DEBUG(dbgs() << "LV: The target has no vector registers.\n");
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MaxVectorSize = 1;

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