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[RISCV] Remove Commutable property from Zfa fltq/fleq instructions.
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2 files changed

+7
-7
lines changed

2 files changed

+7
-7
lines changed

llvm/lib/Target/RISCV/RISCVInstrInfoF.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -251,7 +251,7 @@ multiclass FPUnaryOp_r_frm_m<bits<7> funct7, bits<5> rs2val,
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let hasSideEffects = 0, mayLoad = 0, mayStore = 0, mayRaiseFPException = 1,
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IsSignExtendingOpW = 1 in
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class FPCmp_rr<bits<7> funct7, bits<3> funct3, string opcodestr,
254-
DAGOperand rty, bit Commutable>
254+
DAGOperand rty, bit Commutable = 0>
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: RVInstR<funct7, funct3, OPC_OP_FP, (outs GPR:$rd),
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(ins rty:$rs1, rty:$rs2), opcodestr, "$rd, $rs1, $rs2"> {
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let isCommutable = Commutable;

llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -61,8 +61,8 @@ def FMAXM_S: FPALU_rr<0b0010100, 0b011, "fmaxm.s", FPR32, /*Commutable*/ 1>;
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def FROUND_S : FPUnaryOp_r_frm<0b0100000, 0b00100, FPR32, FPR32, "fround.s">;
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def FROUNDNX_S : FPUnaryOp_r_frm<0b0100000, 0b00101, FPR32, FPR32, "froundnx.s">;
6363

64-
def FLTQ_S : FPCmp_rr<0b1010000, 0b101, "fltq.s", FPR32, /*Commutable*/ 1>;
65-
def FLEQ_S : FPCmp_rr<0b1010000, 0b100, "fleq.s", FPR32, /*Commutable*/ 1>;
64+
def FLTQ_S : FPCmp_rr<0b1010000, 0b101, "fltq.s", FPR32>;
65+
def FLEQ_S : FPCmp_rr<0b1010000, 0b100, "fleq.s", FPR32>;
6666
} // Predicates = [HasStdExtZfa]
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6868
let Predicates = [HasStdExtZfa, HasStdExtD] in {
@@ -76,8 +76,8 @@ def FCVTMOD_W_D
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: FPUnaryOp_r_rtz<0b1100001, 0b01000, GPR, FPR64, "fcvtmod.w.d">,
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Sched<[WriteFCvtF64ToI32, ReadFCvtF64ToI32]>;
7878

79-
def FLTQ_D : FPCmp_rr<0b1010001, 0b101, "fltq.d", FPR64, /*Commutable*/ 1>;
80-
def FLEQ_D : FPCmp_rr<0b1010001, 0b100, "fleq.d", FPR64, /*Commutable*/ 1>;
79+
def FLTQ_D : FPCmp_rr<0b1010001, 0b101, "fltq.d", FPR64>;
80+
def FLEQ_D : FPCmp_rr<0b1010001, 0b100, "fleq.d", FPR64>;
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} // Predicates = [HasStdExtZfa, HasStdExtD]
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8383
let Predicates = [HasStdExtZfa, HasStdExtD, IsRV32] in {
@@ -98,8 +98,8 @@ def FMAXM_H: FPALU_rr<0b0010110, 0b011, "fmaxm.h", FPR16, /*Commutable*/ 1>;
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def FROUND_H : FPUnaryOp_r_frm<0b0100010, 0b00100, FPR16, FPR16, "fround.h">;
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def FROUNDNX_H : FPUnaryOp_r_frm<0b0100010, 0b00101, FPR16, FPR16, "froundnx.h">;
100100

101-
def FLTQ_H : FPCmp_rr<0b1010010, 0b101, "fltq.h", FPR16, /*Commutable*/ 1>;
102-
def FLEQ_H : FPCmp_rr<0b1010010, 0b100, "fleq.h", FPR16, /*Commutable*/ 1>;
101+
def FLTQ_H : FPCmp_rr<0b1010010, 0b101, "fltq.h", FPR16>;
102+
def FLEQ_H : FPCmp_rr<0b1010010, 0b100, "fleq.h", FPR16>;
103103
} // Predicates = [HasStdExtZfa, HasStdExtZfh]
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