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[cherrypick][X86] Do not combine LRINT and TRUNC #10385

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Merged
merged 1 commit into from
Apr 1, 2025
Merged

[cherrypick][X86] Do not combine LRINT and TRUNC #10385

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5 changes: 0 additions & 5 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -52654,11 +52654,6 @@ static SDValue combineTruncate(SDNode *N, SelectionDAG &DAG,
return DAG.getNode(X86ISD::MMX_MOVD2W, DL, MVT::i32, BCSrc);
}

// Try to combine (trunc (vNi64 (lrint x))) to (vNi32 (lrint x)).
if (Src.getOpcode() == ISD::LRINT && VT.getScalarType() == MVT::i32 &&
Src.hasOneUse())
return DAG.getNode(ISD::LRINT, DL, VT, Src.getOperand(0));

return SDValue();
}

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18 changes: 18 additions & 0 deletions llvm/test/CodeGen/X86/lrint-conv-i64.ll
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Expand Up @@ -45,6 +45,24 @@ entry:
ret i64 %0
}

define i32 @PR125324(float %x) {
; SSE-LABEL: PR125324:
; SSE: # %bb.0: # %entry
; SSE-NEXT: cvtss2si %xmm0, %rax
; SSE-NEXT: # kill: def $eax killed $eax killed $rax
; SSE-NEXT: retq
;
; AVX-LABEL: PR125324:
; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvtss2si %xmm0, %rax
; AVX-NEXT: # kill: def $eax killed $eax killed $rax
; AVX-NEXT: retq
entry:
%0 = tail call i64 @llvm.lrint.i64.f32(float %x)
%1 = trunc i64 %0 to i32
ret i32 %1
}

declare i64 @llvm.lrint.i64.f32(float) nounwind readnone
declare i64 @llvm.lrint.i64.f64(double) nounwind readnone
declare i64 @llvm.lrint.i64.f80(x86_fp80) nounwind readnone