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merged 1 commit into from
Nov 12, 2019
Merged

[upstreaming] Revert changes to ThreadPlanStepInRange::FrameMatchesAv… #254

merged 1 commit into from
Nov 12, 2019

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@Teemperor Teemperor requested a review from jimingham November 11, 2019 12:28
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These are equivalent formulations. The green version checks num_libraries before calculating the frame shared library, which is fine though probably not actually significantly faster; module from Frame is pretty cheap. But num_libraries is usually 0, so it's fine to check that first. So if this reduces conflicts, go for it.

@Teemperor Teemperor merged commit 285469a into swiftlang:swift/master Nov 12, 2019
swift-ci pushed a commit that referenced this pull request Apr 6, 2024
@snikitav
[AArch64] SimplifyDemandedBitsForTargetNode - add AArch64ISD::BICi ha…
d38bff4 
…ndling (llvm#76644)

Fold BICi if all destination bits are already known to be zeroes

```llvm
define <8 x i16> @haddu_known(<8 x i8> %a0, <8 x i8> %a1) {
  %x0 = zext <8 x i8> %a0 to <8 x i16>
  %x1 = zext <8 x i8> %a1 to <8 x i16>
  %hadd = call <8 x i16> @llvm.aarch64.neon.uhadd.v8i16(<8 x i16> %x0, <8 x i16> %x1)
  %res = and <8 x i16> %hadd, <i16 511, i16 511, i16 511, i16 511,i16 511, i16 511, i16 511, i16 511>
  ret <8 x i16> %res
}
declare <8 x i16> @llvm.aarch64.neon.uhadd.v8i16(<8 x i16>, <8 x i16>)
```

```
haddu_known:                            // @haddu_known
        ushll   v0.8h, v0.8b, #0
        ushll   v1.8h, v1.8b, #0
        uhadd   v0.8h, v0.8h, v1.8h
        bic     v0.8h, #254, lsl #8 <-- this one will be removed as we know high bits are zero extended
        ret
```

Fixes llvm#53881
Fixes llvm#53622
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