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[clang backend] In AArch64's DataLayout, specify a minimum function alignment of 4. (#90702) #8795

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[clang backend] In AArch64's DataLayout, specify a minimum function alignment of 4. (#90702) #8795

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12 changes: 6 additions & 6 deletions clang/lib/Basic/Targets/AArch64.cpp
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Expand Up @@ -1384,11 +1384,11 @@ AArch64leTargetInfo::AArch64leTargetInfo(const llvm::Triple &Triple,
void AArch64leTargetInfo::setDataLayout() {
if (getTriple().isOSBinFormatMachO()) {
if(getTriple().isArch32Bit())
resetDataLayout("e-m:o-p:32:32-i64:64-i128:128-n32:64-S128", "_");
resetDataLayout("e-m:o-p:32:32-i64:64-i128:128-n32:64-S128-Fn32", "_");
else
resetDataLayout("e-m:o-i64:64-i128:128-n32:64-S128", "_");
resetDataLayout("e-m:o-i64:64-i128:128-n32:64-S128-Fn32", "_");
} else
resetDataLayout("e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128");
resetDataLayout("e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32");
}

void AArch64leTargetInfo::getTargetDefines(const LangOptions &Opts,
Expand All @@ -1411,7 +1411,7 @@ void AArch64beTargetInfo::getTargetDefines(const LangOptions &Opts,

void AArch64beTargetInfo::setDataLayout() {
assert(!getTriple().isOSBinFormatMachO());
resetDataLayout("E-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128");
resetDataLayout("E-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32");
}

WindowsARM64TargetInfo::WindowsARM64TargetInfo(const llvm::Triple &Triple,
Expand All @@ -1434,8 +1434,8 @@ WindowsARM64TargetInfo::WindowsARM64TargetInfo(const llvm::Triple &Triple,

void WindowsARM64TargetInfo::setDataLayout() {
resetDataLayout(Triple.isOSBinFormatMachO()
? "e-m:o-i64:64-i128:128-n32:64-S128"
: "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128",
? "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
: "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128-Fn32",
Triple.isOSBinFormatMachO() ? "_" : "");
}

Expand Down
2 changes: 1 addition & 1 deletion clang/test/CodeGen/aarch64-type-sizes.c
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@@ -1,7 +1,7 @@
// RUN: %clang_cc1 -triple aarch64_be-none-linux-gnu -emit-llvm -w -o - %s | FileCheck %s
// char by definition has size 1

// CHECK: target datalayout = "E-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
// CHECK: target datalayout = "E-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"

int check_short(void) {
return sizeof(short);
Expand Down
2 changes: 1 addition & 1 deletion clang/test/CodeGen/coff-aarch64-type-sizes.c
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Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
// RUN: %clang_cc1 -triple aarch64-windows -emit-llvm -w -o - %s | FileCheck %s

// CHECK: target datalayout = "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128"
// CHECK: target datalayout = "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128-Fn32"
// CHECK: target triple = "aarch64-unknown-windows-msvc"

int check_short(void) {
Expand Down
6 changes: 3 additions & 3 deletions clang/test/CodeGen/target-data.c
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Expand Up @@ -185,15 +185,15 @@

// RUN: %clang_cc1 -triple arm64-unknown -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=AARCH64
// AARCH64: target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
// AARCH64: target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"

// RUN: %clang_cc1 -triple arm64_32-apple-ios7.0 -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=AARCH64-ILP32
// AARCH64-ILP32: target datalayout = "e-m:o-p:32:32-i64:64-i128:128-n32:64-S128"
// AARCH64-ILP32: target datalayout = "e-m:o-p:32:32-i64:64-i128:128-n32:64-S128-Fn32"

// RUN: %clang_cc1 -triple arm64-pc-win32-macho -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=AARCH64-WIN32-MACHO
// AARCH64-WIN32-MACHO: target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
// AARCH64-WIN32-MACHO: target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"

// RUN: %clang_cc1 -triple thumb-unknown-gnueabi -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=THUMB
Expand Down
6 changes: 3 additions & 3 deletions clang/test/CodeGenCXX/member-alignment.cpp
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Expand Up @@ -5,11 +5,11 @@
// RUN: %clang_cc1 -emit-llvm -triple ppc64le-unknown-linux-gnu %s -o - | \
// RUN: FileCheck -check-prefix CHECK-NOEXTRAALIGN %s
// RUN: %clang_cc1 -emit-llvm -triple arm64-unknown-linux-gnu %s -o - | \
// RUN: FileCheck -check-prefix CHECK-EXTRAALIGN %s
// RUN: FileCheck -check-prefix CHECK-NOEXTRAALIGN %s
// RUN: %clang_cc1 -emit-llvm -triple arm64-apple-ios %s -o - | \
// RUN: FileCheck -check-prefix CHECK-EXTRAALIGN %s
// RUN: FileCheck -check-prefix CHECK-NOEXTRAALIGN %s
// RUN: %clang_cc1 -emit-llvm -triple aarch64-unknown-linux-gnu %s -o - | \
// RUN: FileCheck -check-prefix CHECK-EXTRAALIGN %s
// RUN: FileCheck -check-prefix CHECK-NOEXTRAALIGN %s
// RUN: %clang_cc1 -emit-llvm -triple mips-unknown-linux-gnu %s -o - | \
// RUN: FileCheck -check-prefix CHECK-EXTRAALIGN %s
// RUN: %clang_cc1 -emit-llvm -triple x86_64-unknown-fuchsia %s -o - | \
Expand Down
6 changes: 3 additions & 3 deletions clang/test/CodeGenCXX/ptrauth-member-function-pointer.cpp
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Expand Up @@ -102,7 +102,7 @@ typedef void (Derived0::*MethodTy1)();
// CHECK-NEXT: store { i64, i64 } { i64 ptrtoint (ptr @_ZN5Base08virtual1Ev_vfpthunk_.ptrauth.4 to i64), i64 0 }, ptr %[[METHOD7]], align 8
// CHECK: ret void

// CHECK: define linkonce_odr hidden void @_ZN5Base08virtual1Ev_vfpthunk_(ptr noundef %[[THIS:.*]]) {{.*}}align 2
// CHECK: define linkonce_odr hidden void @_ZN5Base08virtual1Ev_vfpthunk_(ptr noundef %[[THIS:.*]]) {{.*}}
// CHECK: %[[THIS_ADDR:.*]] = alloca ptr, align 8
// CHECK: store ptr %[[THIS]], ptr %[[THIS_ADDR]], align 8
// CHECK: %[[THIS1:.*]] = load ptr, ptr %[[THIS_ADDR]], align 8
Expand All @@ -118,7 +118,7 @@ typedef void (Derived0::*MethodTy1)();
// CHECK-NEXT: musttail call void %[[V5]](ptr noundef nonnull align {{[0-9]+}} dereferenceable(8) %[[V0]]) [ "ptrauth"(i32 0, i64 %[[V7]]) ]
// CHECK-NEXT: ret void

// CHECK: define linkonce_odr hidden void @_ZN5Base08virtual3Ev_vfpthunk_(ptr noundef %{{.*}}) {{.*}}align 2
// CHECK: define linkonce_odr hidden void @_ZN5Base08virtual3Ev_vfpthunk_(ptr noundef %{{.*}}) {{.*}}
// CHECK: load ptr, ptr %{{.*}}, align 8
// CHECK: load ptr, ptr %{{.*}}, align 8
// CHECK: %[[VTABLE:.*]] = load ptr, ptr %{{.*}}, align 8
Expand All @@ -128,7 +128,7 @@ typedef void (Derived0::*MethodTy1)();
// CHECK: getelementptr inbounds ptr, ptr %[[V4]], i64 1
// CHECK: call i64 @llvm.ptrauth.blend(i64 %{{.*}}, i64 53007)

// CHECK: define linkonce_odr hidden void @_ZN5Base016virtual_variadicEiz_vfpthunk_(ptr noundef %[[THIS:.*]], i32 noundef %0, ...){{.*}} align 2
// CHECK: define linkonce_odr hidden void @_ZN5Base016virtual_variadicEiz_vfpthunk_(ptr noundef %[[THIS:.*]], i32 noundef %0, ...){{.*}}
// CHECK: %[[THIS_ADDR:.*]] = alloca ptr, align 8
// CHECK-NEXT: %[[_ADDR:.*]] = alloca i32, align 4
// CHECK-NEXT: store ptr %[[THIS]], ptr %[[THIS_ADDR]], align 8
Expand Down
2 changes: 1 addition & 1 deletion clang/test/CodeGenCXX/ptrauth-thunks.cpp
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Expand Up @@ -21,7 +21,7 @@ namespace Test1 {
}
}

// CHECK-LABEL: define linkonce_odr void @_ZTv0_n24_N5Test11DD0Ev(ptr noundef %this){{.*}} align 2
// CHECK-LABEL: define linkonce_odr void @_ZTv0_n24_N5Test11DD0Ev(ptr noundef %this)
// CHECK: %[[This:.*]] = load ptr
// CHECK: %[[SignedVTable:.*]] = load ptr, ptr %[[This]], align 8
// CHECK: %[[SignedVTableAsInt:.*]] = ptrtoint ptr %[[SignedVTable]] to i64
Expand Down
20 changes: 10 additions & 10 deletions clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp
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Expand Up @@ -2742,7 +2742,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@_ZN1SC1El
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
Expand All @@ -2755,7 +2755,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@_ZN1ScvcEv
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
Expand Down Expand Up @@ -3228,7 +3228,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@_ZN1SD1Ev
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
Expand All @@ -3238,7 +3238,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@_ZN1SC2El
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
Expand All @@ -3252,7 +3252,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@_ZN1SD2Ev
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
// CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
Expand Down Expand Up @@ -4001,7 +4001,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SC1El
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
Expand All @@ -4014,7 +4014,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1ScvcEv
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
Expand Down Expand Up @@ -4487,7 +4487,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SD1Ev
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
Expand All @@ -4497,7 +4497,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SC2El
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
Expand Down Expand Up @@ -5114,7 +5114,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SD2Ev
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
// CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
Expand Down
30 changes: 15 additions & 15 deletions clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp
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Expand Up @@ -3249,7 +3249,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@_ZN1SC1El
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
Expand All @@ -3262,7 +3262,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@_ZN1ScvcEv
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
Expand Down Expand Up @@ -3763,7 +3763,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@_ZN1SD1Ev
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
Expand All @@ -3773,7 +3773,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@_ZN1SC2El
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
Expand All @@ -3787,7 +3787,7 @@ int main() {
//
//
// CHECK9-LABEL: define {{[^@]+}}@_ZN1SD2Ev
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
// CHECK9-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
Expand Down Expand Up @@ -4579,7 +4579,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@_ZN1SC1El
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
Expand All @@ -4592,7 +4592,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@_ZN1ScvcEv
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
Expand Down Expand Up @@ -4768,7 +4768,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@_ZN1SD1Ev
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 {
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
Expand All @@ -4778,7 +4778,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@_ZN1SC2El
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
Expand All @@ -4792,7 +4792,7 @@ int main() {
//
//
// CHECK11-LABEL: define {{[^@]+}}@_ZN1SD2Ev
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
// CHECK11-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
Expand Down Expand Up @@ -4931,7 +4931,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SC1El
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
Expand All @@ -4944,7 +4944,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1ScvcEv
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
Expand Down Expand Up @@ -5445,7 +5445,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SD1Ev
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
Expand All @@ -5455,7 +5455,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SC2El
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
Expand Down Expand Up @@ -6128,7 +6128,7 @@ int main() {
//
//
// CHECK13-LABEL: define {{[^@]+}}@_ZN1SD2Ev
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
// CHECK13-SAME: (ptr nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat {
// CHECK13-NEXT: entry:
// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
Expand Down
8 changes: 8 additions & 0 deletions llvm/lib/IR/AutoUpgrade.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -5318,6 +5318,14 @@ std::string llvm::UpgradeDataLayoutString(StringRef DL, StringRef TT) {
return Res;
}

// AArch64 data layout upgrades.
if (T.isAArch64()) {
// Add "-Fn32"
if (!DL.empty() && !DL.contains("-Fn32"))
Res.append("-Fn32");
return Res;
}

if (!T.isX86())
return Res;

Expand Down
8 changes: 4 additions & 4 deletions llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -260,15 +260,15 @@ static std::string computeDataLayout(const Triple &TT,
bool LittleEndian) {
if (TT.isOSBinFormatMachO()) {
if (TT.getArch() == Triple::aarch64_32)
return "e-m:o-p:32:32-i64:64-i128:128-n32:64-S128";
return "e-m:o-i64:64-i128:128-n32:64-S128";
return "e-m:o-p:32:32-i64:64-i128:128-n32:64-S128-Fn32";
return "e-m:o-i64:64-i128:128-n32:64-S128-Fn32";
}
if (TT.isOSBinFormatCOFF())
return "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128";
return "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128-Fn32";
std::string Endian = LittleEndian ? "e" : "E";
std::string Ptr32 = TT.getEnvironment() == Triple::GNUILP32 ? "-p:32:32" : "";
return Endian + "-m:e" + Ptr32 +
"-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128";
"-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32";
}

static StringRef computeDefaultCPU(const Triple &TT, StringRef CPU) {
Expand Down
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