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[5.0 backport] conform Unsafe(Mutable)RawBufferPointer conform to _HasContiguousBytes #21632

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weissi
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@weissi weissi commented Jan 4, 2019

(cherry picked from commit f87ffd2)

backport of #21611 to swift-5.0-branch

@weissi weissi requested a review from milseman January 4, 2019 10:59
@weissi weissi requested a review from a team as a code owner January 4, 2019 10:59
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weissi commented Jan 4, 2019

@swift-ci please test

@weissi weissi changed the title conform Unsafe(Mutable)RawBufferPointer conform to _HasContiguousBytes [5.0 backport] conform Unsafe(Mutable)RawBufferPointer conform to _HasContiguousBytes Jan 4, 2019
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LGTM

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weissi commented Jan 5, 2019

@milseman thanks! @airspeedswift / @milseman there's special authorisation required to merge to the 5.0 branch, should I ping anyone or can either of you do that?

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I can approve it. However, should we have added benchmarks showing the perf improvement?

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Also tests of this new path, probably.

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weissi commented Jan 6, 2019

@swift-ci Please benchmark

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swift-ci commented Jan 6, 2019

Build comment file:

Performance: -O

TEST OLD NEW DELTA RATIO
Regression
DictionaryOfAnyHashableStrings_lookup 4225 4665 +10.4% 0.91x

Performance: -Osize

TEST OLD NEW DELTA RATIO
Improvement
Hanoi 4031 3690 -8.5% 1.09x

Performance: -Onone

TEST OLD NEW DELTA RATIO
Improvement
PrefixWhileArray 35038 31329 -10.6% 1.12x
How to read the data The tables contain differences in performance which are larger than 8% and differences in code size which are larger than 1%.

If you see any unexpected regressions, you should consider fixing the
regressions before you merge the PR.

Noise: Sometimes the performance results (not code size!) contain false
alarms. Unexpected regressions which are marked with '(?)' are probably noise.
If you see regressions which you cannot explain you can try to run the
benchmarks again. If regressions still show up, please consult with the
performance team (@eeckstein).

Hardware Overview
  Model Name: Mac Pro
  Model Identifier: MacPro6,1
  Processor Name: 12-Core Intel Xeon E5
  Processor Speed: 2.7 GHz
  Number of Processors: 1
  Total Number of Cores: 12
  L2 Cache (per Core): 256 KB
  L3 Cache: 30 MB
  Memory: 64 GB
--------------

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weissi commented Jan 8, 2019

@airspeedswift does #21706 look good for the benchmarks? One you're happy with this and it's merged to master, I'll make a separate PR targeting swift-5.0-branch. Then we can merge that and see the results of this very PR.

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weissi commented Jan 15, 2019

@airspeedswift I assume you're happy with tests instead of benchmarks too (#21743)?

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@weissi yep

@airspeedswift airspeedswift merged commit 7322676 into swiftlang:swift-5.0-branch Jan 15, 2019
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4 participants