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[silgen] Change silgen destructor to access ref_element_addr through begin_access [deinit]. #29072

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gottesmm
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@gottesmm gottesmm commented Jan 8, 2020

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gottesmm commented Jan 8, 2020

@swift-ci test

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@atrick atrick left a comment

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Thanks

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atrick commented Jan 8, 2020

@swift-ci benchmark

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swift-ci commented Jan 8, 2020

Performance: -O

Regression OLD NEW DELTA RATIO
FlattenListFlatMap 5132 6315 +23.1% 0.81x (?)
FlattenListLoop 2838 3158 +11.3% 0.90x (?)

Code size: -O

Performance: -Osize

Regression OLD NEW DELTA RATIO
FlattenListLoop 2888 3139 +8.7% 0.92x (?)
 
Improvement OLD NEW DELTA RATIO
PrefixWhileCountableRange 18 16 -11.1% 1.12x (?)
DropWhileAnySeqCRangeIterLazy 142 130 -8.5% 1.09x (?)

Code size: -Osize

Performance: -Onone

Code size: -swiftlibs

How to read the data The tables contain differences in performance which are larger than 8% and differences in code size which are larger than 1%.

If you see any unexpected regressions, you should consider fixing the
regressions before you merge the PR.

Noise: Sometimes the performance results (not code size!) contain false
alarms. Unexpected regressions which are marked with '(?)' are probably noise.
If you see regressions which you cannot explain you can try to run the
benchmarks again. If regressions still show up, please consult with the
performance team (@eeckstein).

Hardware Overview
  Model Name: Mac mini
  Model Identifier: Macmini8,1
  Processor Name: Intel Core i7
  Processor Speed: 3.2 GHz
  Number of Processors: 1
  Total Number of Cores: 6
  L2 Cache (per Core): 256 KB
  L3 Cache: 12 MB
  Memory: 64 GB

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LGTM

@gottesmm gottesmm merged commit 1f1603c into swiftlang:master Jan 9, 2020
@gottesmm gottesmm deleted the pr-4fc3226fa119351bf363a50e981847403a32369a branch January 9, 2020 00:04
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5 participants