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STM32L4xx: IAR memory maps updated #10303
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@juhoeskeli, thank you for your changes. |
@ARMmbed/team-st-mcd Please review |
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My issue is still the same...
I would expect that tool chain files for these 3 targets:
- TARGET_STM32L475xG
- TARGET_STM32L476xG
- TARGET_STM32L486xG
are the same (except RAM and ROM values of course)
And maybe this PR is not compatible with all the works that @deepikabhavnani is doing n other PR ?
@jeromecoutant I tried @deepikabhavnani PR for this target and the allocation made by that change is such that the 32kB RAM is left unused (this happens due to forced ordering of regions). The changes I present here have been adapted from her work and utilize all of the RAM which I believe was her intention as well. Let's wait for @deepikabhavnani to comment. If the only thing blocking is the need to support those two targets you mention, I can add those as well. |
Test run: FAILEDSummary: 1 of 11 test jobs failed Failed test jobs:
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@jeromecoutant please take a look. I added those two targets you requested. I was not able to run the code on L476 as I don't have that. For all three the map file looked good and RAM was utilized as expected. Also, it was OK for @deepikabhavnani to proceed with this PR. A sample of the map file:
|
ci started |
ci restarted |
Test run: SUCCESSSummary: 11 of 11 test jobs passed |
Description
Fully utilize target RAM when using IAR. Tested with mbed-os-example-cellular (MTB_ADV_WISE_1570 - L486, MTB_STM_L475).
CSTACK is placed in 32kB RAM. Then the symbols start filling from there and continue to 96kB RAM. Heap placement is left to linker (placed last in my tests) and will grow to take up the rest of the space available.
The change can be even simpler if we don't care where CSTACK ends up. Without specifically allocating it in my tests it goes before the heap.
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