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Merged
merged 5 commits into from
Jun 15, 2015
Merged

Change target name and support InterruptIn function. #1178

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f149bda
Change target name to all upper case.
hjjeon0608 Jun 11, 2015
f34ee0d
Add InterruptIn function.
hjjeon0608 Jun 11, 2015
5a4ce3c
Merge branch 'master' of https://github.com/mbedmicro/mbed
hjjeon0608 Jun 11, 2015
c6f7c5d
Create a common handler.
hjjeon0608 Jun 11, 2015
60a87d9
Completed and added pwmout_api
hjjeon0608 Jun 11, 2015
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9 changes: 9 additions & 0 deletions libraries/mbed/targets/cmsis/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/W7500x.h
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Expand Up @@ -661,6 +661,15 @@ typedef struct
#define PWM_CH6 ((PWM_CHn_TypeDef *) (W7500x_PWM_BASE + 0x600UL))
#define PWM_CH7 ((PWM_CHn_TypeDef *) (W7500x_PWM_BASE + 0x700UL))

#define PWM_CH0_BASE (W7500x_PWM_BASE)
#define PWM_CH1_BASE (W7500x_PWM_BASE + 0x100UL)
#define PWM_CH2_BASE (W7500x_PWM_BASE + 0x200UL)
#define PWM_CH3_BASE (W7500x_PWM_BASE + 0x300UL)
#define PWM_CH4_BASE (W7500x_PWM_BASE + 0x400UL)
#define PWM_CH5_BASE (W7500x_PWM_BASE + 0x500UL)
#define PWM_CH6_BASE (W7500x_PWM_BASE + 0x600UL)
#define PWM_CH7_BASE (W7500x_PWM_BASE + 0x700UL)

#define RNG ((RNG_TypeDef *) W7500x_RNG_BASE)

#define SSP0 ((SSP_TypeDef*) (SSP0_BASE))
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4 changes: 4 additions & 0 deletions libraries/mbed/targets/hal/TARGET_WIZNET/TARGET_W7500x/PeripheralPins.h
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Expand Up @@ -53,4 +53,8 @@ extern const PinMap PinMap_SPI_SCLK[];
extern const PinMap PinMap_SPI_MOSI[];
extern const PinMap PinMap_SPI_MISO[];
extern const PinMap PinMap_SPI_SSEL[];

//*** PWM ***

extern const PinMap PinMap_PWM[];
#endif
17 changes: 9 additions & 8 deletions ...aries/mbed/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/PeripheralNames.h
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Expand Up @@ -60,14 +60,15 @@ typedef enum {
I2C_1 = (int)I2C1_BASE
} I2CName;

typedef enum {
PWM_1 = 0
// PWM_1 = (int)TIM1_BASE,
// PWM_3 = (int)TIM3_BASE,
// PWM_14 = (int)TIM14_BASE,
// PWM_15 = (int)TIM15_BASE,
// PWM_16 = (int)TIM16_BASE,
// PWM_17 = (int)TIM17_BASE
typedef enum {
PWM_0 = (int)PWM_CH0_BASE,
PWM_1 = (int)PWM_CH1_BASE,
PWM_2 = (int)PWM_CH2_BASE,
PWM_3 = (int)PWM_CH3_BASE,
PWM_4 = (int)PWM_CH4_BASE,
PWM_5 = (int)PWM_CH5_BASE,
PWM_6 = (int)PWM_CH6_BASE,
PWM_7 = (int)PWM_CH7_BASE
} PWMName;

#ifdef __cplusplus
Expand Down
54 changes: 38 additions & 16 deletions libraries/mbed/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/PeripheralPins.c
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Expand Up @@ -72,34 +72,56 @@ const PinMap PinMap_I2C_SCL[] = {
//*** SPI ***

const PinMap PinMap_SPI_SCLK[] = {
{PA_6 , SPI_0, 0},
{PB_1 , SPI_1, 0},
{PC_12, SPI_0, 3},
{PA_12, SPI_1, 3},
{PA_6 , SPI_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)},
{PB_1 , SPI_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)},
{PC_12, SPI_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)},
{PA_12, SPI_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)},
{NC , NC , 0}
};

const PinMap PinMap_SPI_MOSI[] = {
{PA_8 , SPI_0, 0},
{PB_3 , SPI_1, 0},
{PC_10, SPI_0, 3},
{PA_14, SPI_1, 3},
{PA_8 , SPI_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)},
{PB_3 , SPI_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)},
{PC_10, SPI_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)},
{PA_14, SPI_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)},
{NC , NC , 0}
};

const PinMap PinMap_SPI_MISO[] = {
{PA_7 , SPI_0, 0},
{PB_2 , SPI_1, 0},
{PC_11, SPI_0, 3},
{PA_13, SPI_1, 3},
{PA_7 , SPI_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)},
{PB_2 , SPI_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)},
{PC_11, SPI_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)},
{PA_13, SPI_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)},
{NC , NC , 0}
};

const PinMap PinMap_SPI_SSEL[] = {
{PA_5 , SPI_0, 0},
{PB_0 , SPI_1, 0},
{PC_13, SPI_0, 3},
{PA_11, SPI_1, 3},
{PA_5 , SPI_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)},
{PB_0 , SPI_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)},
{PC_13, SPI_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)},
{PA_11, SPI_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)},
{NC , NC , 0}
};

const PinMap PinMap_PWM[] = {
{PA_0 , PWM_6, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)},
{PA_1 , PWM_7, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)},
{PA_5 , PWM_2, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)},
{PA_6 , PWM_3, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)},
{PA_7 , PWM_4, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)},
{PA_8 , PWM_5, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)},
{PA_9 , PWM_6, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)},
{PA_10, PWM_7, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF3)},
{PC_0 , PWM_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)},
{PC_1 , PWM_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)},
{PC_2 , PWM_2, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)},
{PC_3 , PWM_3, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)},
{PC_4 , PWM_4, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)},
{PC_5 , PWM_5, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)},
{PC_8 , PWM_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)},
{PC_9 , PWM_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)},
{PC_10, PWM_2, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)},
{PC_11, PWM_3, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)},
{NC , NC , WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)}
};

44 changes: 21 additions & 23 deletions libraries/mbed/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/PinNames.h
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Expand Up @@ -39,10 +39,10 @@ extern "C" {


// See W7500x_hal_gpio.h for values of MODE, PUPD and AFNUM
#define WIZ_PIN_DATA(MODE, PUPD, AFNUM) ((int)(((AFNUM) << 8) | ((PUPD) << 4) | ((MODE) << 0)))
#define WIZ_PIN_MODE(X) (((X) >> 0) & 0x0F)
#define WIZ_PIN_DATA(MODE, PUPD, AFNUM) ((int)(((MODE) << 8) | ((PUPD) << 4) | ((AFNUM) << 0)))
#define WIZ_PIN_PUPD(X) (((X) >> 4) & 0x0F)
#define WIZ_PIN_AFNUM(X) (((X) >> 8) & 0x0F)
#define WIZ_PIN_AFNUM(X) (((X) >> 0) & 0x0F)
#define WIZ_PIN_MODE(X) (((X) >> 8) & 0x0F)
#define WIZ_MODE_INPUT (0)
#define WIZ_MODE_OUTPUT (1)
#define WIZ_MODE_AF (2)
Expand All @@ -53,9 +53,9 @@ extern "C" {
#define WIZ_GPIO_OPEN_DRAIN (3) /*!< Open Drain activation */


#define WIZ_AFNUM(X)(((uint32_t)(X) >> 8) & 0xF) // AF number (0=AF0, 1=AF1, 2=AF2, 3=AF3)
#define WIZ_PORT(X) (((uint32_t)(X) >> 4) & 0xF) // port number (0=A, 1=B, 2=C, 3=D)
#define WIZ_PIN(X) ((uint32_t)(X) & 0xF) // pin number
#define WIZ_PIN_NUM(X) ((uint32_t)(X) & 0xF) // pin number
#define WIZ_PIN_INDEX(X) (1 << ((uint32_t)(X) & 0xF)) // pin index : flag bit


typedef enum {
Expand All @@ -65,8 +65,7 @@ typedef enum {


typedef enum {
// W7500x Pin Names (AF[9:8] + PORT[5:4] + PIN[3:0])

// W7500x PORT[5:4] + PIN[3:0])
PA_0 = 0x000,
PA_1 = 0x001,
PA_2 = 0x002,
Expand All @@ -83,7 +82,7 @@ typedef enum {
PA_13 = 0x00D,
PA_14 = 0x00E,
PA_15 = 0x00F,

PB_0 = 0x010, //SSEL1/SD_SEL
PB_1 = 0x011, //SCLK1/SD_CLK
PB_2 = 0x012, //MISO1/SD_MISO
Expand All @@ -100,25 +99,25 @@ typedef enum {
PB_13 = 0x01D,
PB_14 = 0x01E,
PB_15 = 0x01F,

PC_0 = 0x120, // 0xx:U_CTS1, 1xx:GPIOC_0, 2xx:PWM0
PC_1 = 0x121, // 0xx:U_RTS1, 1xx:GPIOC_1, 2xx:PWM1
PC_0 = 0x020, // 0xx:U_CTS1, 1xx:GPIOC_0, 2xx:PWM0
PC_1 = 0x021, // 0xx:U_RTS1, 1xx:GPIOC_1, 2xx:PWM1
PC_2 = 0x022,
PC_3 = 0x023,
PC_4 = 0x124, // 0xx:SDA1, 1xx:GPIOC_4, 2xx:PWM4
PC_4 = 0x024, // 0xx:SDA1, 1xx:GPIOC_4, 2xx:PWM4
PC_5 = 0x025,
PC_6 = 0x026,
PC_7 = 0x027,
PC_8 = 0x128, // 0xx:PWM0, 1xx:GPIOC_8, 2xx:SCL0, 3xx:AIN7
PC_9 = 0x129, // 0xx:PWM1, 1xx:GPIOC_9, 2xx:SDA0, 3xx:AIN6

PC_10 = 0x32A, // 0xx:U_TXD2, 1xx:GPIOC_10, 2xx:PWM2, 3xx:AIN5
PC_11 = 0x32B, // 0xx:U_RXD2, 1xx:GPIOC_11, 2xx:PWM3, 3xx:AIN4
PC_12 = 0x32C, // 0xx:AIN3, 1xx:GPIOC_12, 2xx:SSEL0, 3xx:AIN3
PC_13 = 0x32D, // 0xx:AIN2, 1xx:GPIOC_13, 2xx:SCLK0, 3xx:AIN2
PC_14 = 0x32E, // 0xx:AIN1, 1xx:GPIOC_14, 2xx:MISO0, 3xx:AIN1
PC_15 = 0x32F, // 0xx:AIN0, 1xx:GPIOC_15, 2xx:MOSI0, 3xx:AIN0

PC_8 = 0x028, // 0xx:PWM0, 1xx:GPIOC_8, 2xx:SCL0, 3xx:AIN7
PC_9 = 0x029, // 0xx:PWM1, 1xx:GPIOC_9, 2xx:SDA0, 3xx:AIN6
PC_10 = 0x02A, // 0xx:U_TXD2, 1xx:GPIOC_10, 2xx:PWM2, 3xx:AIN5
PC_11 = 0x02B, // 0xx:U_RXD2, 1xx:GPIOC_11, 2xx:PWM3, 3xx:AIN4
PC_12 = 0x02C, // 0xx:AIN3, 1xx:GPIOC_12, 2xx:SSEL0, 3xx:AIN3
PC_13 = 0x02D, // 0xx:AIN2, 1xx:GPIOC_13, 2xx:SCLK0, 3xx:AIN2
PC_14 = 0x02E, // 0xx:AIN1, 1xx:GPIOC_14, 2xx:MISO0, 3xx:AIN1
PC_15 = 0x02F, // 0xx:AIN0, 1xx:GPIOC_15, 2xx:MOSI0, 3xx:AIN0
PD_0 = 0x030,
PD_1 = 0x031,
PD_2 = 0x032,
Expand Down Expand Up @@ -185,7 +184,6 @@ typedef enum {
PullNone = 0,
PullDown = 1,
PullUp = 2,
OpenDrain = 3,
PullDefault = PullNone
} PinMode;

Expand Down
2 changes: 1 addition & 1 deletion libraries/mbed/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device.h
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Expand Up @@ -50,7 +50,7 @@

#define DEVICE_RTC 0

#define DEVICE_PWMOUT 0
#define DEVICE_PWMOUT 1

#define DEVICE_SLEEP 0

Expand Down
9 changes: 7 additions & 2 deletions libraries/mbed/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/objects.h
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Expand Up @@ -43,9 +43,13 @@ extern "C" {

struct gpio_irq_s {
IRQn_Type irq_n;
uint32_t irq_index;
uint32_t event;
PinName pin;
uint32_t pin_index;
uint32_t pin_num;
uint32_t port_num;
uint32_t rise_null;
uint32_t fall_null;
};

struct port_s {
Expand Down Expand Up @@ -83,10 +87,11 @@ struct i2c_s {
};

struct pwmout_s {
PWMName pwm;
PWM_CHn_TypeDef * PWM_CHx;
PinName pin;
uint32_t period;
uint32_t pulse;
uint32_t PrescalerValue;
};

#include "gpio_object.h"
Expand Down
32 changes: 13 additions & 19 deletions libraries/mbed/targets/hal/TARGET_WIZNET/TARGET_W7500x/gpio_api.c
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Expand Up @@ -34,44 +34,38 @@

extern uint32_t Get_GPIO_BaseAddress(uint32_t port_idx);

uint32_t gpio_set(PinName pin)
{
MBED_ASSERT(pin != (PinName)NC);
//uint32_t gpio_set(PinName pin)
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Why gpio_set is not implemented?

//{
// MBED_ASSERT(pin != (PinName)NC);

pin_function(pin, WIZ_PIN_DATA(WIZ_MODE_INPUT, WIZ_GPIO_NOPULL, 0));
// //pin_function(pin, WIZ_PIN_DATA(WIZ_MODE_INPUT, WIZ_GPIO_NOPULL, 1));

return (uint32_t)(1 << ((uint32_t)pin & 0xF)); // Return the pin mask
}
// return (uint32_t)(1 << ((uint32_t)pin & 0xF)); // Return the pin mask
//}

void gpio_init(gpio_t *obj, PinName pin)
{
obj->pin = pin;
if (pin == (PinName)NC) {
return;
}

uint32_t port_index = WIZ_PORT(pin);

GPIO_TypeDef *gpio = (GPIO_TypeDef *)Get_GPIO_BaseAddress(port_index);

// Fill GPIO object structure for future use
obj->mask = gpio_set(pin);

obj->port_num = WIZ_PORT(pin);
obj->pin_index = WIZ_PIN_INDEX(pin);
obj->pin = pin;
GPIO_TypeDef *gpio = (GPIO_TypeDef *)Get_GPIO_BaseAddress(obj->port_num);
obj->reg_data_in = &gpio->DATA;
}

void gpio_mode(gpio_t *obj, PinMode mode)
{
pin_mode(obj->pin, mode);
obj->mode = mode;
}

void gpio_dir(gpio_t *obj, PinDirection direction)
{
MBED_ASSERT(obj->pin != (PinName)NC);
obj->direction = direction;

if (direction == PIN_OUTPUT) {
pin_function(obj->pin, WIZ_PIN_DATA(WIZ_MODE_OUTPUT, WIZ_GPIO_NOPULL, 0));
} else { // PIN_INPUT
pin_function(obj->pin, WIZ_PIN_DATA(WIZ_MODE_INPUT, WIZ_GPIO_NOPULL, 0));
}
pin_function(obj->pin, WIZ_PIN_DATA(obj->direction, obj->mode, 1));
}
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