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MultiTech mDot: use mbed tools to merge bootloader and application. #12918

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Original file line number Diff line number Diff line change
Expand Up @@ -28,15 +28,13 @@
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

; FIRST 64 KB FLASH FOR BOOTLOADER
; REST 448 KB FLASH FOR APPLICATION
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08010000
#define MBED_APP_START 0x08000000
#endif

; STM32F411RE: 512 KB FLASH (0x80000)
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x70000
#define MBED_APP_SIZE 0x80000
#endif

; 128 KB SRAM (0x20000)
Expand All @@ -56,7 +54,13 @@
; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM
#define VECTOR_SIZE 0x198

#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100

#define MBED_IRAM1_START (MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE)


#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE+MBED_CRASH_REPORT_RAM_SIZE)

LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region

Expand All @@ -66,7 +70,10 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
.ANY (+RO)
}

RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
RW_m_crash_data (MBED_RAM_START+VECTOR_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}

RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data
.ANY (+RW +ZI)
}

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -28,29 +28,47 @@
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000
#endif

#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x80000
#endif

#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif

#define Stack_Size MBED_BOOT_STACK_SIZE

#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x20000
#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
#define MBED_VECTTABLE_RAM_SIZE 0x198
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)

; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000)
; FIRST 64 KB FLASH FOR BOOTLOADER
; REST 448 KB FLASH FOR APPLICATION
LR_IROM1 0x08010000 0x70000 { ; load region size_region
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region

ER_IROM1 0x08010000 0x70000 { ; load address = execution address
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}

RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}

; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM
RW_IRAM1 (0x20000000+0x198) (0x20000-0x198-Stack_Size) { ; RW data
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}

ARM_LIB_STACK (0x20000000+0x20000) EMPTY -Stack_Size { ; stack
ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
}
}

Original file line number Diff line number Diff line change
@@ -1,17 +1,24 @@
/* Linker script to configure memory regions. */
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000
#endif

#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 512K
#endif

#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif

STACK_SIZE = MBED_BOOT_STACK_SIZE;

M_CRASH_DATA_RAM_SIZE = 0x100;

/* Linker script to configure memory regions. */
MEMORY
{
/* First 64kB of flash reserved for bootloader */
/* Other 448kB for application */
FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 448K
RAM (rwx) : ORIGIN = 0x20000198, LENGTH = 128k - 0x198
{
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
RAM (rwx) : ORIGIN = 0x20000198, LENGTH = 128k - 0x198
}

/* Linker script to place sections and symbol values. Should be used together
Expand Down Expand Up @@ -85,6 +92,18 @@ SECTIONS

__etext = .;
_sidata = .;

.crash_data_ram :
{
. = ALIGN(8);
__CRASH_DATA_RAM__ = .;
__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
KEEP(*(.keep.crash_data_ram))
*(.m_crash_data_ram) /* This is a user defined section */
. += M_CRASH_DATA_RAM_SIZE;
. = ALIGN(8);
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
} > RAM

.data : AT (__etext)
{
Expand Down
Original file line number Diff line number Diff line change
@@ -1,25 +1,35 @@
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x80000; }

/* [ROM = 512kb = 0x80000] */
define symbol __intvec_start__ = 0x08010000;
define symbol __region_ROM_start__ = 0x08010000;
define symbol __region_ROM_end__ = 0x0807FFFF;
define symbol __intvec_start__ = MBED_APP_START;
define symbol __region_ROM_start__ = MBED_APP_START;
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;

/* [RAM = 128kb = 0x20000] Vector table dynamic copy: 102 vectors = 408 bytes (0x198) to be reserved in RAM */
define symbol __NVIC_start__ = 0x20000000;
define symbol __NVIC_end__ = 0x20000197; /* Aligned on 8 bytes */
define symbol __region_RAM_start__ = 0x20000198;
define symbol __region_CRASH_DATA_RAM_start__ = 0x20000198;
define symbol __region_CRASH_DATA_RAM_end__ = 0x20000297;
define symbol __region_RAM_start__ = 0x20000298;
define symbol __region_RAM_end__ = 0x2001FFFF;

/* Memory regions */
define memory mem with size = 4G;
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];

/* Define Crash Data Symbols */
define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;

/* Stack and Heap */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x8000;
define symbol __size_heap__ = 0x15000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -40,10 +40,8 @@
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#ifndef VECT_TAB_OFFSET
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#endif


/* Select the clock sources (other than HSI) to start with (0=OFF, 1=ON) */
Expand Down Expand Up @@ -97,11 +95,23 @@ void SystemInit(void)
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */

#if defined(__ICCARM__)
#pragma section=".intvec"
#define FLASH_VTOR_BASE ((uint32_t)__section_begin(".intvec"))
#elif defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
extern uint32_t Load$$LR$$LR_IROM1$$Base[];
#define FLASH_VTOR_BASE ((uint32_t)Load$$LR$$LR_IROM1$$Base)
#elif defined(__GNUC__)
extern uint32_t g_pfnVectors[];
#define FLASH_VTOR_BASE ((uint32_t)g_pfnVectors)
#else
#error "Flash vector address not set for this toolchain"
#endif
/* Configure the Vector Table location add offset address ------------------*/
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
SCB->VTOR = FLASH_VTOR_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif

}
Expand Down
10 changes: 3 additions & 7 deletions targets/targets.json
Original file line number Diff line number Diff line change
Expand Up @@ -4570,19 +4570,15 @@
"extra_labels_add": ["STM32F4", "STM32F411RE"],
"macros_add": [
"HSE_VALUE=26000000",
"USE_PLL_HSE_EXTC=0",
"VECT_TAB_OFFSET=0x00010000"
"USE_PLL_HSE_EXTC=0"
],
"post_binary_hook": {
"function": "MTSCode.combine_bins_mts_dot",
"toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"]
},
"device_has_add": ["MPU"],
"device_has_remove": [
"SERIAL_FC"
],
"release_versions": ["2", "5"],
"device_name": "STM32F411RE"
"device_name": "STM32F411RE",
"bootloader_supported": true
},
"MTS_DRAGONFLY_F411RE": {
"inherits": ["FAMILY_STM32"],
Expand Down
49 changes: 0 additions & 49 deletions tools/bootloaders/MTS_MDOT_F411RE/LICENSE.txt

This file was deleted.

Binary file removed tools/bootloaders/MTS_MDOT_F411RE/bootloader.bin
Binary file not shown.
1 change: 0 additions & 1 deletion tools/export/uvision/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -136,7 +136,6 @@ class Uvision(Exporter):
"TEENSY3_1Code.binary_hook",
"LPCTargetCode.lpc_patch",
"LPC4088Code.binary_hook",
"MTSCode.combine_bins_mts_dot",
"MTSCode.combine_bins_mts_dragonfly",
"NCS36510TargetCode.ncs36510_addfib",
"LPC55S69Code.binary_hook",
Expand Down
5 changes: 0 additions & 5 deletions tools/targets/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -562,11 +562,6 @@ def _combine_bins_helper(target_name, binf):
os.remove(binf)
os.rename(target, binf)

@staticmethod
def combine_bins_mts_dot(t_self, resources, elf, binf):
"""A hook for the MTS MDOT"""
MTSCode._combine_bins_helper("MTS_MDOT_F411RE", binf)

@staticmethod
def combine_bins_mts_dragonfly(t_self, resources, elf, binf):
"""A hoof for the MTS Dragonfly"""
Expand Down