Coding convention changes

targets/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/sys.cpp

@@ -14,7 +14,8 @@ extern "C" {
 
 extern char Image$$RW_IRAM1$$ZI$$Limit[];
 
-extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
+extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3)
+{
     uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
     uint32_t sp_limit = __current_sp();
 

targets/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K66F/device/cmsis_nvic.c

@@ -32,11 +32,13 @@
 
 extern void InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler);
 
-void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
+void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
     InstallIRQHandler(IRQn, vector);
 }
 
-uint32_t NVIC_GetVector(IRQn_Type IRQn) {
+uint32_t NVIC_GetVector(IRQn_Type IRQn)
+{
     uint32_t *vectors = (uint32_t*)SCB->VTOR;
     return vectors[IRQn + 16];
 }

targets/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K66F/pwmout_api.c

@@ -27,7 +27,8 @@ static float pwm_clock_mhz;
 /* Array of FTM peripheral base address. */
 static FTM_Type *const ftm_addrs[] = FTM_BASE_PTRS;
 
-void pwmout_init(pwmout_t* obj, PinName pin) {
+void pwmout_init(pwmout_t* obj, PinName pin)
+{
     PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
     MBED_ASSERT(pwm != (PWMName)NC);
 
@@ -72,11 +73,13 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
     pinmap_pinout(pin, PinMap_PWM);
 }
 
-void pwmout_free(pwmout_t* obj) {
+void pwmout_free(pwmout_t* obj)
+{
     FTM_Deinit(ftm_addrs[obj->pwm_name >> TPM_SHIFT]);
 }
 
-void pwmout_write(pwmout_t* obj, float value) {
+void pwmout_write(pwmout_t* obj, float value)
+{
     if (value < 0.0f) {
         value = 0.0f;
     } else if (value > 1.0f) {
@@ -93,7 +96,8 @@ void pwmout_write(pwmout_t* obj, float value) {
     FTM_SetSoftwareTrigger(base, true);
 }
 
-float pwmout_read(pwmout_t* obj) {
+float pwmout_read(pwmout_t* obj)
+{
     FTM_Type *base = ftm_addrs[obj->pwm_name >> TPM_SHIFT];
     uint16_t count = (base->CONTROLS[obj->pwm_name & 0xF].CnV) & FTM_CnV_VAL_MASK;
     uint16_t mod = base->MOD & FTM_MOD_MOD_MASK;
@@ -104,16 +108,19 @@ float pwmout_read(pwmout_t* obj) {
     return (v > 1.0f) ? (1.0f) : (v);
 }
 
-void pwmout_period(pwmout_t* obj, float seconds) {
+void pwmout_period(pwmout_t* obj, float seconds)
+{
     pwmout_period_us(obj, seconds * 1000000.0f);
 }
 
-void pwmout_period_ms(pwmout_t* obj, int ms) {
+void pwmout_period_ms(pwmout_t* obj, int ms)
+{
     pwmout_period_us(obj, ms * 1000);
 }
 
 // Set the PWM period, keeping the duty cycle the same.
-void pwmout_period_us(pwmout_t* obj, int us) {
+void pwmout_period_us(pwmout_t* obj, int us)
+{
     FTM_Type *base = ftm_addrs[obj->pwm_name >> TPM_SHIFT];
     float dc = pwmout_read(obj);
 
@@ -122,15 +129,18 @@ void pwmout_period_us(pwmout_t* obj, int us) {
     pwmout_write(obj, dc);
 }
 
-void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
+void pwmout_pulsewidth(pwmout_t* obj, float seconds)
+{
     pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
 }
 
-void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
+void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
+{
     pwmout_pulsewidth_us(obj, ms * 1000);
 }
 
-void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
+void pwmout_pulsewidth_us(pwmout_t* obj, int us)
+{
     FTM_Type *base = ftm_addrs[obj->pwm_name >> TPM_SHIFT];
     uint32_t value = (uint32_t)(pwm_clock_mhz * (float)us);
 

targets/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K66F/serial_api.c

@@ -41,7 +41,8 @@ static clock_name_t const uart_clocks[] = UART_CLOCK_FREQS;
 int stdio_uart_inited = 0;
 serial_t stdio_uart;
 
-void serial_init(serial_t *obj, PinName tx, PinName rx) {
+void serial_init(serial_t *obj, PinName tx, PinName rx)
+{
     uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
     uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
     obj->index = pinmap_merge(uart_tx, uart_rx);
@@ -74,16 +75,19 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
     }
 }
 
-void serial_free(serial_t *obj) {
+void serial_free(serial_t *obj)
+{
     UART_Deinit(uart_addrs[obj->index]);
     serial_irq_ids[obj->index] = 0;
 }
 
-void serial_baud(serial_t *obj, int baudrate) {
+void serial_baud(serial_t *obj, int baudrate)
+{
     UART_SetBaudRate(uart_addrs[obj->index], (uint32_t)baudrate, CLOCK_GetFreq(uart_clocks[obj->index]));
 }
 
-void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
+void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
+{
     UART_Type *base = uart_addrs[obj->index];
     uint8_t temp;
     /* Set bit count and parity mode. */
@@ -111,7 +115,8 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
 /******************************************************************************
  * INTERRUPTS HANDLING
  ******************************************************************************/
-static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index) {
+static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index)
+{
     UART_Type *base = uart_addrs[index];
 
     /* If RX overrun. */
@@ -130,36 +135,43 @@ static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint
     }
 }
 
-void uart0_irq() {
+void uart0_irq()
+{
     uint32_t status_flags = UART0->S1;
     uart_irq((status_flags & kUART_TxDataRegEmptyFlag), (status_flags & kUART_RxDataRegFullFlag), 0);
 }
 
-void uart1_irq() {
+void uart1_irq()
+{
     uint32_t status_flags = UART1->S1;
     uart_irq((status_flags & UART_S1_TDRE_MASK), (status_flags & UART_S1_RDRF_MASK), 1);
 }
 
-void uart2_irq() {
+void uart2_irq()
+{
     uint32_t status_flags = UART2->S1;
     uart_irq((status_flags & UART_S1_TDRE_MASK), (status_flags & UART_S1_RDRF_MASK), 2);
 }
 
-void uart3_irq() {
+void uart3_irq()
+{
     uint32_t status_flags = UART3->S1;
     uart_irq((status_flags & UART_S1_TDRE_MASK), (status_flags & UART_S1_RDRF_MASK), 3);
 }
 
-void uart4_irq() {
+void uart4_irq()
+{
     uint32_t status_flags = UART4->S1;
     uart_irq((status_flags & UART_S1_TDRE_MASK), (status_flags & UART_S1_RDRF_MASK), 4);
 }
-void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
+void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
+{
     irq_handler = handler;
     serial_irq_ids[obj->index] = id;
 }
 
-void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
+void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
+{
     IRQn_Type uart_irqs[] = UART_RX_TX_IRQS;
     uint32_t vector = 0;
 
@@ -225,45 +237,53 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
     }
 }
 
-int serial_getc(serial_t *obj) {
+int serial_getc(serial_t *obj)
+{
     while (!serial_readable(obj));
     uint8_t data;
     data = UART_ReadByte(uart_addrs[obj->index]);
 
     return data;
 }
 
-void serial_putc(serial_t *obj, int c) {
+void serial_putc(serial_t *obj, int c)
+{
     while (!serial_writable(obj));
     UART_WriteByte(uart_addrs[obj->index], (uint8_t)c);
 }
 
-int serial_readable(serial_t *obj) {
+int serial_readable(serial_t *obj)
+{
     uint32_t status_flags = UART_GetStatusFlags(uart_addrs[obj->index]);
     if (status_flags & kUART_RxOverrunFlag)
         UART_ClearStatusFlags(uart_addrs[obj->index], kUART_RxOverrunFlag);
     return (status_flags & kUART_RxDataRegFullFlag);
 }
 
-int serial_writable(serial_t *obj) {
+int serial_writable(serial_t *obj)
+{
     uint32_t status_flags = UART_GetStatusFlags(uart_addrs[obj->index]);
     if (status_flags & kUART_RxOverrunFlag)
         UART_ClearStatusFlags(uart_addrs[obj->index], kUART_RxOverrunFlag);
     return (status_flags & kUART_TxDataRegEmptyFlag);
 }
 
-void serial_clear(serial_t *obj) {
+void serial_clear(serial_t *obj)
+{
 }
 
-void serial_pinout_tx(PinName tx) {
+void serial_pinout_tx(PinName tx)
+{
     pinmap_pinout(tx, PinMap_UART_TX);
 }
 
-void serial_break_set(serial_t *obj) {
+void serial_break_set(serial_t *obj)
+{
     uart_addrs[obj->index]->C2 |= UART_C2_SBK_MASK;
 }
 
-void serial_break_clear(serial_t *obj) {
+void serial_break_clear(serial_t *obj)
+{
     uart_addrs[obj->index]->C2 &= ~UART_C2_SBK_MASK;
 }
 

targets/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K66F/spi_api.c

@@ -32,7 +32,8 @@ static SPI_Type *const spi_address[] = SPI_BASE_PTRS;
 /* Array of SPI bus clock frequencies */
 static clock_name_t const spi_clocks[] = SPI_CLOCK_FREQS;
 
-void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
+void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
+{
     // determine the SPI to use
     uint32_t spi_mosi = pinmap_peripheral(mosi, PinMap_SPI_MOSI);
     uint32_t spi_miso = pinmap_peripheral(miso, PinMap_SPI_MISO);
@@ -53,11 +54,13 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
     }
 }
 
-void spi_free(spi_t *obj) {
+void spi_free(spi_t *obj)
+{
     DSPI_Deinit(spi_address[obj->instance]);
 }
 
-void spi_format(spi_t *obj, int bits, int mode, int slave) {
+void spi_format(spi_t *obj, int bits, int mode, int slave)
+{
 
     dspi_master_config_t master_config;
     dspi_slave_config_t slave_config;
@@ -84,18 +87,21 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
     }
 }
 
-void spi_frequency(spi_t *obj, int hz) {
+void spi_frequency(spi_t *obj, int hz)
+{
     uint32_t busClock = CLOCK_GetFreq(spi_clocks[obj->instance]);
     DSPI_MasterSetBaudRate(spi_address[obj->instance], kDSPI_Ctar0, (uint32_t)hz, busClock);
     //Half clock period delay after SPI transfer
     DSPI_MasterSetDelayTimes(spi_address[obj->instance], kDSPI_Ctar0, kDSPI_LastSckToPcs, busClock, 500000000 / hz);
 }
 
-static inline int spi_readable(spi_t * obj) {
+static inline int spi_readable(spi_t * obj)
+{
     return (DSPI_GetStatusFlags(spi_address[obj->instance]) & kDSPI_RxFifoDrainRequestFlag);
 }
 
-int spi_master_write(spi_t *obj, int value) {
+int spi_master_write(spi_t *obj, int value)
+{
     dspi_command_data_config_t command;
     uint32_t rx_data;
     DSPI_GetDefaultDataCommandConfig(&command);
@@ -112,11 +118,13 @@ int spi_master_write(spi_t *obj, int value) {
     return rx_data & 0xffff;
 }
 
-int spi_slave_receive(spi_t *obj) {
+int spi_slave_receive(spi_t *obj)
+{
     return spi_readable(obj);
 }
 
-int spi_slave_read(spi_t *obj) {
+int spi_slave_read(spi_t *obj)
+{
     uint32_t rx_data;
 
     while (!spi_readable(obj));
@@ -125,7 +133,8 @@ int spi_slave_read(spi_t *obj) {
     return rx_data & 0xffff;
 }
 
-void spi_slave_write(spi_t *obj, int value) {
+void spi_slave_write(spi_t *obj, int value)
+{
     DSPI_SlaveWriteDataBlocking(spi_address[obj->instance], (uint32_t)value);
 }
 

targets/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K66F/us_ticker.c

@@ -21,7 +21,8 @@
 
 static int us_ticker_inited = 0;
 
-void us_ticker_init(void) {
+void us_ticker_init(void)
+{
     if (us_ticker_inited) {
         return;
     }
@@ -51,23 +52,27 @@ void us_ticker_init(void) {
 }
 
 
-uint32_t us_ticker_read() {
+uint32_t us_ticker_read()
+{
     if (!us_ticker_inited) {
         us_ticker_init();
     }
 
     return ~(PIT_GetCurrentTimerCount(PIT, kPIT_Chnl_1));
 }
 
-void us_ticker_disable_interrupt(void) {
+void us_ticker_disable_interrupt(void)
+{
     PIT_DisableInterrupts(PIT, kPIT_Chnl_3, kPIT_TimerInterruptEnable);
 }
 
-void us_ticker_clear_interrupt(void) {
+void us_ticker_clear_interrupt(void)
+{
     PIT_ClearStatusFlags(PIT, kPIT_Chnl_3, PIT_TFLG_TIF_MASK);
 }
 
-void us_ticker_set_interrupt(timestamp_t timestamp) {
+void us_ticker_set_interrupt(timestamp_t timestamp)
+{
     int delta = (int)(timestamp - us_ticker_read());
     if (delta <= 0) {
         // This event was in the past.

targets/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K82F/device/TOOLCHAIN_ARM_STD/sys.cpp

@@ -14,7 +14,8 @@ extern "C" {
 
 extern char Image$$RW_IRAM1$$ZI$$Limit[];
 
-extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
+extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3)
+{
     uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
     uint32_t sp_limit = __current_sp();