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I2C fix added, SPI slave fixes added and SPISLAVE enabled #3597

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41d2153
flash A and B merged. add_fib.py will merge flash banks A and B in the
pradeep-gr Nov 29, 2016
079aedf
GCC linker script changes to enable both flash banks A and B in NCS36…
pradeep-gr Dec 20, 2016
7b84bf1
I2C fix added. SPI slave fix added and SPISLAVE enabled
pradeep-gr Jan 17, 2017
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103 changes: 27 additions & 76 deletions targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_GCC_ARM/NCS36510.ld
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Original file line number Diff line number Diff line change
Expand Up @@ -4,8 +4,9 @@

MEMORY {
VECTORS (rx) : ORIGIN = 0x00003000, LENGTH = 0x00000090
FLASH (rx) : ORIGIN = 0x00003090, LENGTH = 320K - 4K - 0x90
RAM (rwx) : ORIGIN = 0x3FFF4000, LENGTH = 48K
FLASHA (rx) : ORIGIN = 0x00003090, LENGTH = 320K - 4K - 0x90
FLASHB (rx) : ORIGIN = 0x00102000, LENGTH = 320K
RAM (rwx) : ORIGIN = 0x3FFF4000, LENGTH = 48K
}

/* Linker script to place sections and symbol values. Should be used together
Expand Down Expand Up @@ -37,47 +38,24 @@ MEMORY {
ENTRY(Reset_Handler)

SECTIONS {
.isr_vector :
.isr_vector :
{
__vector_table = .;
KEEP(*(.vector_table))
. = ALIGN(4);
} > VECTORS

/* ensure that uvisor bss is at the beginning of memory */
.uvisor.bss (NOLOAD):
mbed_rtos_start = .;
.text_mbed_rtos : /* Place mbed-os and HAL code in FlashA */
{
. = ALIGN(32);
__uvisor_bss_start = .;

/* protected uvisor main bss */
. = ALIGN(32);
__uvisor_bss_main_start = .;
KEEP(*(.keep.uvisor.bss.main))
. = ALIGN(32);
__uvisor_bss_main_end = .;

/* protected uvisor secure boxes bss */
. = ALIGN(32);
__uvisor_bss_boxes_start = .;
KEEP(*(.keep.uvisor.bss.boxes))
. = ALIGN(32);
__uvisor_bss_boxes_end = .;

. = ALIGN(32);
__uvisor_bss_end = .;
} > RAM

.text :
{
/* uVisor code and data */
. = ALIGN(4);
__uvisor_main_start = .;
*(.uvisor.main)
__uvisor_main_end = .;

*(.text*)


*drivers/*.o(.text* .rodata*)
*events/*.o(.text* .rodata*)
*hal/*.o(.text* .rodata*)
*platform/*.o(.text* .rodata*)
*rtos/*.o(.text* .rodata*)
*targets/*.o(.text* .rodata*)

KEEP(*(.init))
KEEP(*(.fini))

Expand All @@ -95,22 +73,29 @@ MEMORY {
*(SORT(.dtors.*))
*(.dtors)

*(.rodata*)

KEEP(*(.eh_frame*))
} > FLASH

} > FLASHA
mbed_rtos_end = .;
size_of_mbed_rtos = mbed_rtos_end - mbed_rtos_start;

.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
} > FLASHA

.ARM.exidx :
{
__exidx_start = .;
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
__exidx_end = .;
} > FLASH
} > FLASHA

.text : /* Place the remaining application and feature specific code in FlashB */
{
*(.text*)
*(.rodata*)
} > FLASHB

.data :
{
Expand Down Expand Up @@ -144,41 +129,7 @@ MEMORY {
. = ALIGN(32);
__data_end__ = .;

} >RAM AT>FLASH

/* uvisor configuration data */
.uvisor.secure :
{
. = ALIGN(32);
__uvisor_secure_start = .;

/* uvisor secure boxes configuration tables */
. = ALIGN(32);
__uvisor_cfgtbl_start = .;
KEEP(*(.keep.uvisor.cfgtbl))
. = ALIGN(32);
__uvisor_cfgtbl_end = .;

/* pointers to uvisor secure boxes configuration tables */
/* note: no further alignment here, we need to have the exact list of pointers */
__uvisor_cfgtbl_ptr_start = .;
KEEP(*(.keep.uvisor.cfgtbl_ptr_first))
KEEP(*(.keep.uvisor.cfgtbl_ptr))
__uvisor_cfgtbl_ptr_end = .;

/* the following symbols are kept for backward compatibility and will be soon
* deprecated; applications actively using uVisor (__uvisor_mode == UVISOR_ENABLED)
* will need to use uVisor 0.8.x or above, or the security assetions will halt the
* system */
/************************/
__uvisor_data_src = .;
__uvisor_data_start = .;
__uvisor_data_end = .;
/************************/

. = ALIGN(32);
__uvisor_secure_end = .;
} >FLASH
} >RAM AT>FLASHB

.uninitialized (NOLOAD):
{
Expand Down
94 changes: 59 additions & 35 deletions targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_IAR/NCS36510.icf
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@@ -1,49 +1,73 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_1.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00003000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_IROM1_start__ = 0x00003000; /* FLASHA program start*/
define symbol __ICFEDIT_region_IROM1_end__ = 0x00051FFF; /* 316K = 320K - 4K(FIB table), FLASHA end */
define symbol __ICFEDIT_region_IROM2_start__ = 0x00102000;
define symbol __ICFEDIT_region_IROM2_end__ = 0x00151FFF; /* 320K */
define symbol __ICFEDIT_region_EROM1_start__ = 0x0;
define symbol __ICFEDIT_region_EROM1_end__ = 0x0;
define symbol __ICFEDIT_region_EROM2_start__ = 0x0;
define symbol __ICFEDIT_region_EROM2_end__ = 0x0;
define symbol __ICFEDIT_region_EROM3_start__ = 0x0;
define symbol __ICFEDIT_region_EROM3_end__ = 0x0;

/* The memory space denoting the maximum possible amount of addressable memory */
define memory Mem with size = 4G;
define symbol __ICFEDIT_region_IRAM1_start__ = 0x3FFFC000; /* RAMA start */
define symbol __ICFEDIT_region_IRAM1_end__ = 0x3FFFFFFF; /* RAMA end */
define symbol __ICFEDIT_region_IRAM2_start__ = 0x3FFF8000; /* RAMB start */
define symbol __ICFEDIT_region_IRAM2_end__ = 0x3FFFBFFF; /* RAMB end */
define symbol __ICFEDIT_region_IRAM3_start__ = 0x3FFF4000; /* RAMC start */
define symbol __ICFEDIT_region_IRAM3_end__ = 0x3FFF7FFF; /* RAMC end */
define symbol __ICFEDIT_region_ERAM1_start__ = 0x0;
define symbol __ICFEDIT_region_ERAM1_end__ = 0x0;
define symbol __ICFEDIT_region_ERAM2_start__ = 0x0;
define symbol __ICFEDIT_region_ERAM2_end__ = 0x0;
define symbol __ICFEDIT_region_ERAM3_start__ = 0x0;
define symbol __ICFEDIT_region_ERAM3_end__ = 0x0;

/* Memory regions in an address space */
define region FLASHA = Mem:[from 0x00003000 size 0x4D000]; /* 308K = 320K - 4K(FIB table) - 8K(Persistent) */
define region FLASHB = Mem:[from 0x00100000 size 0x50000];
define region RAMA = Mem:[from 0x3FFFC000 size 0x4000];
define region RAMB = Mem:[from 0x3FFF8000 size 0x4000];
/* G2H ZPRO requires RAMC to be enabled */
define region RAMC = Mem:[from 0x3FFF4000 size 0x4000];
define region RAM_ALL = Mem:[from 0x3FFF4000 size 0xC000];
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x200;
define symbol __ICFEDIT_size_heap__ = 0x4000;
/**** End of ICF editor section. ###ICF###*/

/* Create a stack */
define block CSTACK with size = 0x200, alignment = 8 { };

/* No Heap is created for C library, all memory management should be handled by the application */
define block HEAP with alignment = 8, size = 0x4000 { };
define memory mem with size = 4G;
define region FLASH_region = mem:[from __ICFEDIT_region_IROM1_start__ to __ICFEDIT_region_IROM1_end__]
| mem:[from __ICFEDIT_region_IROM2_start__ to __ICFEDIT_region_IROM2_end__];

/* Handle initialization */
do not initialize { section .noinit };
define region RAM_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__]
| mem:[from __ICFEDIT_region_IRAM2_start__ to __ICFEDIT_region_IRAM2_end__]
| mem:[from __ICFEDIT_region_IRAM3_start__ to __ICFEDIT_region_IRAM3_end__];


/* Define overlays for MIB's, ths allows view of one MIB from a application level while
* MAC and PHY only know about their own MIB */
define overlay MIBOVERLAY { section MIBSTARTSECTION };
define overlay MIBOVERLAY { section MIBSECTION };

define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };

/* Initialize RW sections, exclude zero-initialized sections */
initialize by copy with packing = none { readwrite };
initialize by copy { readwrite };

if (isdefinedsymbol(__USE_DLIB_PERTHREAD))
{
// Required in a multi-threaded application
initialize by copy with packing = none { section __DLIB_PERTHREAD };
}

/* Initialize the code in RAM, copied over from FLASH */
initialize by copy with packing = none { readonly code section EXECINRAM };
/*keep { readonly code section .EXECINRAM* } except { readonly code section EXECINRAM };*/

/* Place startup code at a fixed address */
place at start of FLASHA { readonly section .intvec, readonly section SWVERSION,readonly section FIBTABLE,readonly section .cstartup };

/* Place code and data */
/*initialize by copy { readwrite };*/
do not initialize { section .noinit };

/* Place constants and initializers in FLASHA: .rodata and .data_init */
place in FLASHA { readonly };

/* Place .data, .bss, and .noinit */
/* and STACK */
/* The relocatable exception table needs to be aligned at 0x0 or multiple of 0x100,
* hence, place it as first block in RAM.
*/
place at start of RAM_ALL { section RAM_VECTORS };
place in RAM_ALL { readonly code section EXECINRAM };
place at end of RAM_ALL { block CSTACK };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, readonly section SWVERSION, readonly section FIBTABLE };

place in FLASH_region { readonly section .cstartup, readonly };

place in RAM_ALL { readwrite };
place in RAM_ALL { block HEAP };
place in RAM_region { readwrite, block HEAP, section XHEAP, readonly code section EXECINRAM, overlay MIBOVERLAY, readwrite section MIBENDSECTION, block CSTACK};
12 changes: 8 additions & 4 deletions targets/TARGET_ONSEMI/TARGET_NCS36510/i2c.h
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Expand Up @@ -83,14 +83,18 @@
#define I2C_APB_CLK_DIVIDER_VAL_MASK 0x1FE0

/* Error check */
#define I2C_UFL_CHECK (d->membase->STATUS.WORD & 0x80)
#define FIFO_OFL_CHECK (d->membase->STATUS.WORD & 0x10)
#define I2C_BUS_ERR_CHECK (d->membase->STATUS.WORD & 0x04)
#define RD_DATA_READY (d->membase->STATUS.WORD & 0x02)
#define I2C_UFL_CHECK (obj->membase->STATUS.WORD & 0x80)
#define I2C_FIFO_FULL (obj->membase->STATUS.WORD & 0x20)
#define FIFO_OFL_CHECK (obj->membase->STATUS.WORD & 0x10)
#define I2C_BUS_ERR_CHECK (obj->membase->STATUS.WORD & 0x04)
#define RD_DATA_READY (obj->membase->STATUS.WORD & 0x02)
#define I2C_FIFO_EMPTY (obj->membase->STATUS.WORD & 0x01)

#define I2C_API_STATUS_SUCCESS 0
#define PAD_REG_ADRS_BYTE_SIZE 4

#define SEND_COMMAND(cmd) while(!I2C_FIFO_EMPTY); wait_us(1); obj->membase->CMD_REG = cmd;

/** Init I2C device.
* @details
* Sets the necessary registers. The baud rate is set default to 100K
Expand Down
7 changes: 3 additions & 4 deletions targets/TARGET_ONSEMI/TARGET_NCS36510/i2c_api.c
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Original file line number Diff line number Diff line change
Expand Up @@ -31,6 +31,7 @@

#include "i2c.h"
#include "i2c_api.h"
#include "wait_api.h"

#define I2C_READ_WRITE_BIT_MASK 0xFE

Expand Down Expand Up @@ -151,10 +152,10 @@ int i2c_byte_read(i2c_t *obj, int last) /* TODO return size can be uint8_t */
}
if(last) {
/* ACK */
obj->membase->CMD_REG = I2C_CMD_WDAT0;
SEND_COMMAND(I2C_CMD_WDAT0);
} else {
/* No ACK */
obj->membase->CMD_REG = I2C_CMD_WDAT1;
SEND_COMMAND(I2C_CMD_WDAT1);
}
return data;
}
Expand All @@ -168,8 +169,6 @@ int i2c_byte_write(i2c_t *obj, int data)
return Count;
}

obj->membase->CMD_REG = I2C_CMD_VRFY_ACK; /* Verify ACK */

while(obj->membase->STATUS.WORD & I2C_STATUS_CMD_FIFO_OFL_BIT); /* Wait till command overflow ends */

if(obj->membase->STATUS.WORD & I2C_STATUS_BUS_ERR_BIT) {
Expand Down
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