ARMmbed · theotherjimmy · Oct 3, 2017 · Sep 20, 2017
diff --git a/...ets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54608/device/TOOLCHAIN_GCC_ARM/libpower.a b/...ets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54608/device/TOOLCHAIN_GCC_ARM/libpower.a
diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54608/device/TOOLCHAIN_IAR/libpower.a b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54608/device/TOOLCHAIN_IAR/libpower.a
diff --git a/...54608/TARGET_LPCXpresso/PeripheralNames.h → ...546XX/TARGET_LPCXpresso/PeripheralNames.h b/...54608/TARGET_LPCXpresso/PeripheralNames.h → ...546XX/TARGET_LPCXpresso/PeripheralNames.h
diff --git a/...C54608/TARGET_LPCXpresso/PeripheralPins.c → ...C546XX/TARGET_LPCXpresso/PeripheralPins.c b/...C54608/TARGET_LPCXpresso/PeripheralPins.c → ...C546XX/TARGET_LPCXpresso/PeripheralPins.c
diff --git a/...GET_LPC54608/TARGET_LPCXpresso/PinNames.h → ...GET_LPC546XX/TARGET_LPCXpresso/PinNames.h b/...GET_LPC54608/TARGET_LPCXpresso/PinNames.h → ...GET_LPC546XX/TARGET_LPCXpresso/PinNames.h
diff --git a/...LPC54608/TARGET_LPCXpresso/clock_config.c → ...LPC546XX/TARGET_LPCXpresso/clock_config.c b/...LPC54608/TARGET_LPCXpresso/clock_config.c → ...LPC546XX/TARGET_LPCXpresso/clock_config.c
@@ -45,11 +45,11 @@
 /* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
 !!ClocksProfile
 product: Clocks v1.0
-processor: LPC54608J512
-package_id: LPC54608J512ET180
+processor: LPC54618J512
+package_id: LPC54618J512ET180
 mcu_data: ksdk2_0
 processor_version: 0.0.0
-board: LPCXpresso54608
+board: LPCXpresso54618
  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
 
 #include "fsl_power.h"

diff --git a/...LPC54608/TARGET_LPCXpresso/clock_config.h → ...LPC546XX/TARGET_LPCXpresso/clock_config.h b/...LPC54608/TARGET_LPCXpresso/clock_config.h → ...LPC546XX/TARGET_LPCXpresso/clock_config.h
diff --git a/...ARGET_LPC54608/TARGET_LPCXpresso/device.h → ...ARGET_LPC546XX/TARGET_LPCXpresso/device.h b/...ARGET_LPC54608/TARGET_LPCXpresso/device.h → ...ARGET_LPC546XX/TARGET_LPCXpresso/device.h
diff --git a/...C54608/TARGET_LPCXpresso/mbed_overrides.c → ...C546XX/TARGET_LPCXpresso/mbed_overrides.c b/...C54608/TARGET_LPCXpresso/mbed_overrides.c → ...C546XX/TARGET_LPCXpresso/mbed_overrides.c
diff --git a/...so_MCUS/TARGET_LPC54608/device/LPC54608.h → ...so_MCUS/TARGET_LPC546XX/device/LPC54618.h b/...so_MCUS/TARGET_LPC54608/device/LPC54608.h → ...so_MCUS/TARGET_LPC546XX/device/LPC54618.h
@@ -1,7 +1,7 @@
 /*
 ** ###################################################################
-**     Processors:          LPC54608J512BD208
-**                          LPC54608J512ET180
+**     Processors:          LPC54618J512BD208
+**                          LPC54618J512ET180
 **
 **     Compilers:           Keil ARM C/C++ Compiler
 **                          GNU C Compiler
@@ -13,7 +13,7 @@
 **     Build:               b170214
 **
 **     Abstract:
-**         CMSIS Peripheral Access Layer for LPC54608
+**         CMSIS Peripheral Access Layer for LPC54618
 **
 **     Copyright 1997-2016 Freescale Semiconductor, Inc.
 **     Copyright 2016-2017 NXP
@@ -56,16 +56,16 @@
 */
 
 /*!
- * @file LPC54608.h
+ * @file LPC54618.h
  * @version 1.1
  * @date 2016-11-25
- * @brief CMSIS Peripheral Access Layer for LPC54608
+ * @brief CMSIS Peripheral Access Layer for LPC54618
  *
- * CMSIS Peripheral Access Layer for LPC54608
+ * CMSIS Peripheral Access Layer for LPC54618
  */
 
-#ifndef _LPC54608_H_
-#define _LPC54608_H_                             /**< Symbol preventing repeated inclusion */
+#ifndef _LPC54618_H_
+#define _LPC54618_H_                             /**< Symbol preventing repeated inclusion */
 
 /** Memory map major version (memory maps with equal major version number are
  * compatible) */
@@ -181,7 +181,7 @@ typedef enum IRQn {
 #define __FPU_PRESENT                  1         /**< Defines if an FPU is present or not */
 
 #include "core_cm4.h"                  /* Core Peripheral Access Layer */
-#include "system_LPC54608.h"           /* Device specific configuration file */
+#include "system_LPC54618.h"           /* Device specific configuration file */
 
 /*!
  * @}
@@ -713,7 +713,8 @@ typedef struct {
 
 /** CAN - Register Layout Typedef */
 typedef struct {
-       uint8_t RESERVED_0[16];
+       uint8_t RESERVED_0[12];
+  __IO uint32_t DBTP;                              /**< Data Bit Timing Prescaler Register, offset: 0xC */
   __IO uint32_t TEST;                              /**< Test Register, offset: 0x10 */
        uint8_t RESERVED_1[4];
   __IO uint32_t CCCR;                              /**< CC Control Register, offset: 0x18 */
@@ -779,6 +780,23 @@ typedef struct {
  * @{
  */
 
+/*! @name DBTP - Data Bit Timing Prescaler Register */
+#define CAN_DBTP_DSJW_MASK                       (0xFU)
+#define CAN_DBTP_DSJW_SHIFT                      (0U)
+#define CAN_DBTP_DSJW(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_DBTP_DSJW_SHIFT)) & CAN_DBTP_DSJW_MASK)
+#define CAN_DBTP_DTSEG2_MASK                     (0xF0U)
+#define CAN_DBTP_DTSEG2_SHIFT                    (4U)
+#define CAN_DBTP_DTSEG2(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_DBTP_DTSEG2_SHIFT)) & CAN_DBTP_DTSEG2_MASK)
+#define CAN_DBTP_DTSEG1_MASK                     (0x1F00U)
+#define CAN_DBTP_DTSEG1_SHIFT                    (8U)
+#define CAN_DBTP_DTSEG1(x)                       (((uint32_t)(((uint32_t)(x)) << CAN_DBTP_DTSEG1_SHIFT)) & CAN_DBTP_DTSEG1_MASK)
+#define CAN_DBTP_DBRP_MASK                       (0x1F0000U)
+#define CAN_DBTP_DBRP_SHIFT                      (16U)
+#define CAN_DBTP_DBRP(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_DBTP_DBRP_SHIFT)) & CAN_DBTP_DBRP_MASK)
+#define CAN_DBTP_TDC_MASK                        (0x800000U)
+#define CAN_DBTP_TDC_SHIFT                       (23U)
+#define CAN_DBTP_TDC(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_DBTP_TDC_SHIFT)) & CAN_DBTP_TDC_MASK)
+
 /*! @name TEST - Test Register */
 #define CAN_TEST_LBCK_MASK                       (0x10U)
 #define CAN_TEST_LBCK_SHIFT                      (4U)
@@ -815,6 +833,12 @@ typedef struct {
 #define CAN_CCCR_TEST_MASK                       (0x80U)
 #define CAN_CCCR_TEST_SHIFT                      (7U)
 #define CAN_CCCR_TEST(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_CCCR_TEST_SHIFT)) & CAN_CCCR_TEST_MASK)
+#define CAN_CCCR_FDOE_MASK                       (0x100U)
+#define CAN_CCCR_FDOE_SHIFT                      (8U)
+#define CAN_CCCR_FDOE(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_CCCR_FDOE_SHIFT)) & CAN_CCCR_FDOE_MASK)
+#define CAN_CCCR_BRSE_MASK                       (0x200U)
+#define CAN_CCCR_BRSE_SHIFT                      (9U)
+#define CAN_CCCR_BRSE(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_CCCR_BRSE_SHIFT)) & CAN_CCCR_BRSE_MASK)
 #define CAN_CCCR_PXHD_MASK                       (0x1000U)
 #define CAN_CCCR_PXHD_SHIFT                      (12U)
 #define CAN_CCCR_PXHD(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_CCCR_PXHD_SHIFT)) & CAN_CCCR_PXHD_MASK)
@@ -824,6 +848,9 @@ typedef struct {
 #define CAN_CCCR_TXP_MASK                        (0x4000U)
 #define CAN_CCCR_TXP_SHIFT                       (14U)
 #define CAN_CCCR_TXP(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_CCCR_TXP_SHIFT)) & CAN_CCCR_TXP_MASK)
+#define CAN_CCCR_NISO_MASK                       (0x8000U)
+#define CAN_CCCR_NISO_SHIFT                      (15U)
+#define CAN_CCCR_NISO(x)                         (((uint32_t)(((uint32_t)(x)) << CAN_CCCR_NISO_SHIFT)) & CAN_CCCR_NISO_MASK)
 
 /*! @name NBTP - Nominal Bit Timing and Prescaler Register */
 #define CAN_NBTP_NTSEG2_MASK                     (0x7FU)
@@ -898,6 +925,18 @@ typedef struct {
 #define CAN_PSR_BO_MASK                          (0x80U)
 #define CAN_PSR_BO_SHIFT                         (7U)
 #define CAN_PSR_BO(x)                            (((uint32_t)(((uint32_t)(x)) << CAN_PSR_BO_SHIFT)) & CAN_PSR_BO_MASK)
+#define CAN_PSR_DLEC_MASK                        (0x700U)
+#define CAN_PSR_DLEC_SHIFT                       (8U)
+#define CAN_PSR_DLEC(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_PSR_DLEC_SHIFT)) & CAN_PSR_DLEC_MASK)
+#define CAN_PSR_RESI_MASK                        (0x800U)
+#define CAN_PSR_RESI_SHIFT                       (11U)
+#define CAN_PSR_RESI(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_PSR_RESI_SHIFT)) & CAN_PSR_RESI_MASK)
+#define CAN_PSR_RBRS_MASK                        (0x1000U)
+#define CAN_PSR_RBRS_SHIFT                       (12U)
+#define CAN_PSR_RBRS(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_PSR_RBRS_SHIFT)) & CAN_PSR_RBRS_MASK)
+#define CAN_PSR_RFDF_MASK                        (0x2000U)
+#define CAN_PSR_RFDF_SHIFT                       (13U)
+#define CAN_PSR_RFDF(x)                          (((uint32_t)(((uint32_t)(x)) << CAN_PSR_RFDF_SHIFT)) & CAN_PSR_RFDF_MASK)
 #define CAN_PSR_PXE_MASK                         (0x4000U)
 #define CAN_PSR_PXE_SHIFT                        (14U)
 #define CAN_PSR_PXE(x)                           (((uint32_t)(((uint32_t)(x)) << CAN_PSR_PXE_SHIFT)) & CAN_PSR_PXE_MASK)
@@ -12367,5 +12406,5 @@ typedef struct {
  */ /* end of group SDK_Compatibility_Symbols */
 
 
-#endif  /* _LPC54608_H_ */
+#endif  /* _LPC54618_H_ */
 
diff --git a/...ARGET_LPC54608/device/LPC54608_features.h → ...ARGET_LPC546XX/device/LPC54618_features.h b/...ARGET_LPC54608/device/LPC54608_features.h → ...ARGET_LPC546XX/device/LPC54618_features.h
@@ -46,8 +46,8 @@
 ** ###################################################################
 */
 
-#ifndef _LPC54608_FEATURES_H_
-#define _LPC54608_FEATURES_H_
+#ifndef _LPC54618_FEATURES_H_
+#define _LPC54618_FEATURES_H_
 
 /* SOC module features */
 
@@ -133,7 +133,7 @@
 /* CAN module features */
 
 /* @brief Support CANFD or not */
-#define FSL_FEATURE_CAN_SUPPORT_CANFD (0)
+#define FSL_FEATURE_CAN_SUPPORT_CANFD (1)
 
 /* DMA module features */
 
@@ -227,5 +227,5 @@
 /* @brief Base address of the USB dedicated RAM */
 #define FSL_FEATURE_USBHSH_USB_RAM_BASE_ADDRESS (0x40100000)
 
-#endif /* _LPC54608_FEATURES_H_ */
+#endif /* _LPC54618_FEATURES_H_ */
 
diff --git a/...device/TOOLCHAIN_ARM_STD/LPC54608J512.sct → ...device/TOOLCHAIN_ARM_STD/LPC54618J512.sct b/...device/TOOLCHAIN_ARM_STD/LPC54608J512.sct → ...device/TOOLCHAIN_ARM_STD/LPC54618J512.sct
@@ -1,8 +1,8 @@
 #! armcc -E
 /*
 ** ###################################################################
-**     Processors:          LPC54608J512BD208
-**                          LPC54608J512ET180
+**     Processors:          LPC54618J512BD208
+**                          LPC54618J512ET180
 **
 **     Compiler:            Keil ARM C/C++ Compiler
 **     Reference manual:    LPC54S60x/LPC5460x User manual Rev.0.9  7 Nov 2016

diff --git a/...4608/device/TOOLCHAIN_ARM_STD/libpower.ar → ...6XX/device/TOOLCHAIN_ARM_STD/lib_power.ar b/...4608/device/TOOLCHAIN_ARM_STD/libpower.ar → ...6XX/device/TOOLCHAIN_ARM_STD/lib_power.ar
diff --git a/...vice/TOOLCHAIN_ARM_STD/startup_LPC54608.S → ...vice/TOOLCHAIN_ARM_STD/startup_LPC54618.S b/...vice/TOOLCHAIN_ARM_STD/startup_LPC54608.S → ...vice/TOOLCHAIN_ARM_STD/startup_LPC54618.S
@@ -1,7 +1,7 @@
 ;/*****************************************************************************
-; * @file:    startup_LPC54608.s
+; * @file:    startup_LPC54618.s
 ; * @purpose: CMSIS Cortex-M4 Core Device Startup File for the
-; *           LPC54608
+; *           LPC54618
 ; * @version: 1.1
 ; * @date:    2016-11-25
 ; *

diff --git a/...e/TOOLCHAIN_GCC_ARM/LPC54608J512_flash.ld → .../device/TOOLCHAIN_GCC_ARM/LPC54618J512.ld b/...e/TOOLCHAIN_GCC_ARM/LPC54608J512_flash.ld → .../device/TOOLCHAIN_GCC_ARM/LPC54618J512.ld
@@ -1,61 +1,28 @@
 /*
 ** ###################################################################
-**     Processors:          LPC54608J512
+**     Processors:          LPC54618J512
 **
 **     Compiler:            GNU C Compiler
-**     Reference manual:    LPC54608 Series Reference Manual, Rev. 0 , 06/2017
+**     Reference manual:    LPC54618 Series Reference Manual, Rev. 0 , 06/2017
 **     Version:             rev. 1.0, 2017-6-06
 **     Build:               b161214
 **
 **     Abstract:
 **         Linker file for the GNU C Compiler
 **
-**     Copyright (c) 2016 Freescale Semiconductor, Inc.
-**     Copyright (c) 2016 - 2017 , NXP
-**     All rights reserved.
-**
+**     Copyright 2016 Freescale Semiconductor, Inc.
+**     Copyright 2016-2017 NXP
 **     Redistribution and use in source and binary forms, with or without modification,
 **     are permitted provided that the following conditions are met:
 **
-**     o Redistributions of source code must retain the above copyright notice, this list
+**     1. Redistributions of source code must retain the above copyright notice, this list
 **       of conditions and the following disclaimer.
 **
-**     o Redistributions in binary form must reproduce the above copyright notice, this
+**     2. Redistributions in binary form must reproduce the above copyright notice, this
 **       list of conditions and the following disclaimer in the documentation and/or
 **       other materials provided with the distribution.
 **
-**     o Neither the name of copyright holder nor the names of its
-**       contributors may be used to endorse or promote products derived from this
-**       software without specific prior written permission.
-**
-**     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-**     ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-**     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-**     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-**     ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-**     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-**     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-**     ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-**     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-**     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-**
-**     http:                 www.freescale.com
-**     mail:                 [email protected]
-**
-**     Copyright (c) 2016 NXP Semiconductors, Inc.
-**     All rights reserved.
-**
-**     Redistribution and use in source and binary forms, with or without modification,
-**     are permitted provided that the following conditions are met:
-**
-**     o Redistributions of source code must retain the above copyright notice, this list
-**       of conditions and the following disclaimer.
-**
-**     o Redistributions in binary form must reproduce the above copyright notice, this
-**       list of conditions and the following disclaimer in the documentation and/or
-**       other materials provided with the distribution.
-**
-**     o Neither the name of NXP Semiconductors, Inc. nor the names of its
+**     3. Neither the name of the copyright holder nor the names of its
 **       contributors may be used to endorse or promote products derived from this
 **       software without specific prior written permission.
 **
@@ -97,8 +64,6 @@ MEMORY
   m_data                (RW)  : ORIGIN = 0x20000000, LENGTH = 0x00028000
   m_sramx               (RW)  : ORIGIN = 0x04000000, LENGTH = 0x00008000
   m_usb_sram            (RW)  : ORIGIN = 0x40100000, LENGTH = 0x00002000
-
-
 }
 
 /* Define output sections */

diff --git a/...ets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_GCC_ARM/libpower.a b/...ets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_GCC_ARM/libpower.a
diff --git a/...vice/TOOLCHAIN_GCC_ARM/startup_LPC54608.S → ...vice/TOOLCHAIN_GCC_ARM/startup_LPC54618.S b/...vice/TOOLCHAIN_GCC_ARM/startup_LPC54608.S → ...vice/TOOLCHAIN_GCC_ARM/startup_LPC54618.S
@@ -1,54 +1,25 @@
 /* ---------------------------------------------------------------------------------------*/
-/*  @file:    startup_LPC54608.S                                                          */
+/*  @file:    startup_LPC54618.S                                                          */
 /*  @purpose: CMSIS Cortex-M4 Core Device Startup File                                    */
-/*            LPC54608                                                                    */
+/*            LPC54618                                                                    */
 /*  @version: 1.0                                                                         */
 /*  @date:    2017-6-6                                                                    */
 /*  @build:   b161214                                                                     */
 /* ---------------------------------------------------------------------------------------*/
 /*                                                                                        */
-/* Copyright (c) 1997 - 2016 , Freescale Semiconductor, Inc.                              */
-/* Copyright (c) 2016 - 2017 , NXP                                                        */
-/*                                                                                        */
-/* Redistribution and use in source and binary forms, with or without modification,       */
-/* are permitted provided that the following conditions are met:                          */
-/*                                                                                        */
-/* o Redistributions of source code must retain the above copyright notice, this list     */
-/*   of conditions and the following disclaimer.                                          */
-/*                                                                                        */
-/* o Redistributions in binary form must reproduce the above copyright notice, this       */
-/*   list of conditions and the following disclaimer in the documentation and/or          */
-/*   other materials provided with the distribution.                                      */
-/*                                                                                        */
-/* o Neither the name of copyright holder nor the names of its                            */
-/*   contributors may be used to endorse or promote products derived from this            */
-/*   software without specific prior written permission.                                  */
-/*                                                                                        */
-/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND        */
-/* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED          */
-/* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE                 */
-/* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR       */
-/* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES         */
-/* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;           */
-/* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON         */
-/* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT                */
-/* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS          */
-/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                           */
-/*                                                                                        */
-/* Copyright (c) 2016 , NXP Semiconductors, Inc.                                          */
-/* All rights reserved.                                                                   */
-/*                                                                                        */
+/* Copyright 1997-2016 Freescale Semiconductor, Inc.                                      */
+/* Copyright 2016-2017 NXP                                                                */
 /* Redistribution and use in source and binary forms, with or without modification,       */
 /* are permitted provided that the following conditions are met:                          */
 /*                                                                                        */
-/* o Redistributions of source code must retain the above copyright notice, this list     */
+/* 1. Redistributions of source code must retain the above copyright notice, this list    */
 /*   of conditions and the following disclaimer.                                          */
 /*                                                                                        */
-/* o Redistributions in binary form must reproduce the above copyright notice, this       */
+/* 2. Redistributions in binary form must reproduce the above copyright notice, this      */
 /*   list of conditions and the following disclaimer in the documentation and/or          */
 /*   other materials provided with the distribution.                                      */
 /*                                                                                        */
-/* o Neither the name of NXP Semiconductors, Inc. nor the names of its                    */
+/* 3. Neither the name of the copyright holder nor the names of its                       */
 /*   contributors may be used to endorse or promote products derived from this            */
 /*   software without specific prior written permission.                                  */
 /*                                                                                        */

diff --git a/...608/device/TOOLCHAIN_IAR/LPC54608J512.icf → ...6XX/device/TOOLCHAIN_IAR/LPC54618J512.icf b/...608/device/TOOLCHAIN_IAR/LPC54608J512.icf → ...6XX/device/TOOLCHAIN_IAR/LPC54618J512.icf
@@ -1,7 +1,7 @@
 /*
 ** ###################################################################
-**     Processors:          LPC54608J512BD208
-**                          LPC54608J512ET180
+**     Processors:          LPC54618J512BD208
+**                          LPC54618J512ET180
 **
 **     Compiler:            IAR ANSI C/C++ Compiler for ARM
 **     Reference manual:    LPC54S60x/LPC5460x User manual Rev.0.9  7 Nov 2016

diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/lib_power.a b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/lib_power.a
diff --git a/...8/device/TOOLCHAIN_IAR/startup_LPC54608.S → ...X/device/TOOLCHAIN_IAR/startup_LPC54618.S b/...8/device/TOOLCHAIN_IAR/startup_LPC54608.S → ...X/device/TOOLCHAIN_IAR/startup_LPC54618.S
@@ -1,7 +1,7 @@
 ;/*****************************************************************************
-; * @file:    startup_LPC54608.s
+; * @file:    startup_LPC54618.s
 ; * @purpose: CMSIS Cortex-M4 Core Device Startup File
-; *           LPC54608
+; *           LPC54618
 ; * @version: 1.1
 ; * @date:    2016-11-25
 ; *----------------------------------------------------------------------------

diff --git a/...resso_MCUS/TARGET_LPC54608/device/cmsis.h → ...resso_MCUS/TARGET_LPC546XX/device/cmsis.h b/...resso_MCUS/TARGET_LPC54608/device/cmsis.h → ...resso_MCUS/TARGET_LPC546XX/device/cmsis.h
diff --git a/..._MCUS/TARGET_LPC54608/device/cmsis_nvic.h → ..._MCUS/TARGET_LPC546XX/device/cmsis_nvic.h b/..._MCUS/TARGET_LPC54608/device/cmsis_nvic.h → ..._MCUS/TARGET_LPC546XX/device/cmsis_nvic.h
diff --git a/...ET_LPC54608/device/fsl_device_registers.h → ...ET_LPC546XX/device/fsl_device_registers.h b/...ET_LPC54608/device/fsl_device_registers.h → ...ET_LPC546XX/device/fsl_device_registers.h
@@ -36,14 +36,14 @@
  *
  * The CPU macro should be declared in the project or makefile.
  */
-#if (defined(CPU_LPC54608J512BD208) || defined(CPU_LPC54608J512ET180))
+#if (defined(CPU_LPC54618J512BD208) || defined(CPU_LPC54618J512ET180))
 
-#define LPC54608_SERIES
+#define LPC54618_SERIES
 
 /* CMSIS-style register definitions */
-#include "LPC54608.h"
+#include "LPC54618.h"
 /* CPU specific feature definitions */
-#include "LPC54608_features.h"
+#include "LPC54618_features.h"
 
 #else
     #error "No valid CPU defined!"