-
Notifications
You must be signed in to change notification settings - Fork 3k
Registration GR-LYCHEE board as a new mbed board #5857
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Conversation
…nd tests.py I added GR-LYCHEE's configuration in targets.json file. Also, I added GR_LYCHEE as a Renesas new target board in build_travis.py and tests.py.
I added GR_LYCHEE as a new target board in DS-5, e2studio and IAR export.
For supporting to CMSIS5/RTX5, I added the start-up processing of 3 toolchains (ARMCC, GCC_ARM, IAR) and the register definition of RZ/A1LU specific. In addition, I added the linker script files to implement the dynamic HEAP the same as GR-PEACH(RZ/A1H).
In mbed_rtx.h file, I added the definition for GR-LYCHEE to use the "Dynamic Heap" processing when the target is GR_LYCHEE.
I supported the TRNG function when target is GR-LYCHEE. GR-LYCHEE generates TRNG by acquiring the random number of Wifi module(ESP32) incorporated in it using I2C.
How is going? Is there anything to do for this PR? |
} CANName; | ||
|
||
|
||
#define STDIO_UART_TX USBTX |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Is there a reason why this is not part of PinNames? I noticed this in some platforms but not certain about having a macro instead of in PInNames
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
I don't know a clear reason. This have been defined in "PeripheralNames.h" for a long time in GR-PEACH, and I created this the same as GR-PEACH.
Many targets is still defined in PeripheralNames.h, should I move to PInNames.h?
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
It could be moved. I only wondered if there is anything else that I was missing
@@ -0,0 +1,6 @@ | |||
#ifndef RESERVED_PINS_H |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Should this contain license header on top?
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
I modified this content in commit 4bc79b0.
#include "MBRZA1LU.h" | ||
#include "irq_ctrl.h" | ||
|
||
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
{
new line for both functions
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
I modified this content in commit e8378ef .
@hanno-arm please review trng addition (targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/trng_api_esp32.cpp file) |
ARM Internal Ref: IOTSSL-2030 |
I modified the lack of license header in the below header files. - targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/TARGET_MBED_MBRZA1H/reserved_pins.h - targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/TARGET_MBED_MBRZA1LU/reserved_pins.h
Regarding "{" that show the function start, I modified the the arrangement from right of function to new line.
#ifndef MBED_CMSIS_H | ||
#define MBED_CMSIS_H | ||
|
||
#include "MBRZA1LU.h" |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
should this include cmsis_nvic.h ? I just found the bug report for RZ A1H, and pointed me this direction (Isent just now the fix for it)
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
I modified this content in commit 1469fcd.
To get cmsis nvic definitions, I added the process that include "cmsis_nvic.h" in cmsis.h. Relation PR is ARMmbed#5890.
@0xc0170 |
/morph build |
CI triggered while mbedtls reviews TRNG implementation |
Build : SUCCESSBuild number : 928 Triggering tests/morph test |
Exporter Build : SUCCESSBuild number : 616 |
Test : FAILUREBuild number : 768 |
known issue with one target that is being retested currently, we will restart CI |
/morph build |
Build : SUCCESSBuild number : 962 Triggering tests/morph test |
Exporter Build : SUCCESSBuild number : 647 |
Test : SUCCESSBuild number : 789 |
/morph uvisor-test |
I know that it is not optimal that reviewing sometimes takes a long time due to other obligations, but please do not merge PR's that you have requested approval for before the review has been done. |
@hanno-arm We're still going to holding off on releasing this PR until we get feedback for your review. |
@cmonr Could you indicate until when you must have received the review, so I can plan and see if and when I can fit it in? Apologies again for the delay. |
@hanno-arm No worries. The changes in this PR are minimal, and shouldn't take too much time. It would be wonderful if you could squeeze it in next week. |
if (output_length != NULL) { | ||
*output_length = idx; | ||
} | ||
|
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
The stack buffer recv_data
holding the chunks of entropy should be zeroized before the function returns, even if it's only 4 bytes maximum.
send_data[0] = 0; | ||
ret = mI2c.write(ESP32_I2C_ADDR, send_data, 1); | ||
if (ret == 0) { | ||
mI2c.read(ESP32_I2C_ADDR, recv_data, sizeof(recv_data)); |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
This call may fail, but the return value is not checked.
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
I reviewed the TRNG addition and cannot approve it for the following reasons:
- All entropy must be zeroized before the gathering function returns.
- The return value for the I2C
read
call is not checked. This way, it could happen that predictable data is treated as the TRNG output.
@hanno-arm Thank you for the review. For the short term, we'll introduce a PR to disable the TRNG on the board. @TomoYamanaka, please address the above comments in a new PR. |
Related to the review of ARMmbed#5857, I fixed the TRNG function for GR-LYCHEE. - I modified to zeroize "recv_data" before the function return. - I added the processing that check the return value of I2C.read function. If return value is error, "output" is zeroized before function return. - In trng_get_bytes_esp32 function, there is a time lag in the period from ESP32 reset to start working, error may occur when "Write" is called. Thus, I added a retry counter due to address this concern. There is not this counter for "Read" since it is called after "Write".
Related to the review of #5857, I fixed the TRNG function for GR-LYCHEE. - I modified to zeroize "recv_data" before the function return. - I added the processing that check the return value of I2C.read function. If return value is error, "output" is zeroized before function return. - In trng_get_bytes_esp32 function, there is a time lag in the period from ESP32 reset to start working, error may occur when "Write" is called. Thus, I added a retry counter due to address this concern. There is not this counter for "Read" since it is called after "Write".
Description
I register GR-LYCHEE as a Renesas new Mbed board, based on existing GR-PEACH(RZ/A1H) support.
GR-LYCHEE incorporates RZ/A1LU that is RZ/A1 chip series.
Relation PRs
#5628
#5813