CM3DS Maintenance Pull Request #6119
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The HAL implementation (us_ticker.c and lp_ticker.c) now calls function in cmsdk_ticker.c file. This file contains the necessary logic to be able to only use one hardware timer (CMSDK timer) per mbed ticker. This commit also updates the timer driver and removes legacy definition. Signed-off-by: Galanakis, Minos <[email protected]> Signed-off-by: Hugues de Valon <[email protected]>
This commit adds the GPIO drivers. The HAL implementations (gpio_api.c, gpio_irq_api.c, port_api.c) now call these drivers. Legacy definitions have been removed. Serial HAL implementation has been changed to compile at this stage. Signed-off-by: Galanakis, Minos <[email protected]>
This commit adds the SPI driver which is now called by the SPI HAL implementation. It also removes legacy definitions. Signed-off-by: Tamas Kaman <[email protected]>
This commit adds the UART driver and updates the UART HAL implementation to use this driver. It also removes legacy definitions. Signed-off-by: Avinash Mehta <[email protected]>
This patchs adds TRNG support using the upstreamed, open-source, TZ-TRNG driver. It also implements the HAL for TRNG and add it in features. The version.txt file contains information on what commit/branch this driver has been imported from and what files have been deleted. A .mbedignore file is also added in the TZ-TRNG folder to only compile required files. Signed-off-by: Hugues de Valon <[email protected]>
This patch changes the linker files and defines to use the ZBT SSRAM
instead of the FPGA Block RAM for code and data.
The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and
testbench user guide explains the available memories.
This switch improves code memory from 256 kB to 4 MB and data memory
from 128 kB to 4 MB.
However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the
processor can only boot at address 0x00000000 which means that it
expects the vector table to be at that address. That is why we have to
create 2 load regions in the linker scripts: one with only the vector
table at address 0x0 and one with code + data at address 0x00400000.
Because of these two load regions, linker will produce different
behaviours:
* GCC_ARM and IAR will only create 1 binary with both load regions
padding with 0 in between. The binary will then be very large (at least
4 MB) and the flash process will take longer.
* ARM and ARMC6 will create 2 binaries for the two load regions. The
load addresses of the two binaries can be written in the images.txt file
on the MPS2 board. You can also use the --bincombined option of fromelf
utility to produce only 1 large binary.
This patch also adds the memory_zones.h file to try to put in common all
the memory addresses that were previously hard coded in the linker
scripts / startup files.
With that patch in, the simplest option is to directly use the .elf file
with the MPS2, which is only possible with mbb_v225.ebf and more recent
firmwares.
Because greentea does not support .elf file out of the box, a script
that changes the test_spec.json file to replace test binary path
extension from .bin to .elf has been added.
This allows to use ELF greentea test binaries for CM3DS on MPS2+.
It is made to work with the now merged pull request
ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board.
Signed-off-by: Hugues de Valon <[email protected]>
This patch fixes a memory bug. `eth_arch_enetif_init` method call would attempt to write to un-initialized area of memory. Signed-off-by: Galanakis, Minos <[email protected]>
This patch changes the way data is put in the TX_DATA_PORT register when
sending packet over Ethernet.
When this driver is compiled with release compilation profile
(space optimization compiler options) with Arm compiler version 5,
the line:
SMSC9220->TX_DATA_PORT = *pktptr;
generates the assembly instruction to get the pktptr pointed value:
LDM r2!, {r3}
with pktptr = r2
However, the code does not prevent the pktptr value from being unaligned
(to a 32 bits boundary) in that zone and the LDM instruction causes a
HardFault if this is the case. When the compiler option is not activated
(debug and develop compilation profiles), the compiler generates LDR
instruction instead which does not cause a HardFault.
The ARM v7-M states page B3-601: "Unaligned load-store multiples and
word or halfword exclusive accesses always fault."
To face that problem, we check if the data pointer is aligned or not. If
it is, we apply the same algorithm than before. If not, a local variable
is created and we copy in it, byte per byte, the contents at the
unaligned pointer. However, it will impact performances adding 8
instructions (one LD and one ST for each copied byte).
Signed-off-by: Hugues de Valon <[email protected]>
This patch does not bring functional changes. Here is the list of changes: - change to clock frequency to the good value of 25 MHz - remove unused defines in PeripheralNames.h and PinNames.h, move STDIO pins definitions in PinNames.h - remove SDK folder (fpga.* files are not used), moves smsc9220 driver to device/drivers - merge CMSDK_CM3DS.h and SMM_MPS2.h into CM3DS.h, place base address defines in increasing order - remove useless includes in cmsis.h - remove the executable permission of some files - move APB timer drivers into device/drivers - remove legacy peripherallink.h file - remove unused objects in objects.h - fix compiler warnings (ARM, GCC_ARM and IAR) - add a README.md file Signed-off-by: Hugues de Valon <[email protected]>
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Can this be split to at least 3 pull requests? A pull request should include bugfixes/features/updates. If it follows the list you created above, it should be fine. I would even split features to two separate PR (trng will be reviewed by mbedtls team, the memory change by core team) |
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Yes sorry! I am currently splitting this pull request into 4. |
+1 |
This was referenced Feb 22, 2018
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I have created 4 pull requests to split the changes:
When those I merged, I will make an ultimate pull request containing the last changes. |
cmonr
added
needs: review
needs: preceding PR
do not merge
and removed
needs: work
needs: preceding PR
labels
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@hug-dev If I understand both this and the related PRs, this PR won't actually be merged, but is instead being used as an overarching PR, correct? |
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@cmonr Yes exactly! Only the little ones should get merged, this one can be used to get more high-level information, test information and should be closed at the end 😃 |
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CM3DS Maintenance Pull Request
CM3DS is the name used to describe the FPGA example in the Cortex-M Design Start Eval package, running on a MPS2+ board.
This pull request tries to bring 9 commits to the CM3DS target implementation:
The pull request is based on commit ccff46d on the
masterbranch. It introduces aREADME.mdfile with CM3DS specific instructions to build and run mbed OS projects.This pull request has been made possible with development work on other projects:
htrun, make it work with the memory changes: Fix a copy error on Linux htrun#176, Ensure the reboot step happens on MPS2 htrun#180 and Keep the same extension of the executable files copied to MPS2 htrun#181mbedls: Fix retargeting bug when using mbedls.json mbed-ls#269mbedlsThe following people have helped for that pull request: @gaborkertesz, @tamasolaszi, @avinashmehtadelhi, @minosgalanakis, @gyuri-szing, @tkaman and @ashok-rao.
Testing
The pull request has been tested with the mbed OS Cloud Client example on all 3 compilers supported:
ARM,GCC_ARMandIAR.The mbed OS Greentea tests have also been executed for these three compilers, the 68 tests executed all pass. Please find attached the test results for each compiler.
tests_iar.txt
tests_gcc_arm.txt
tests_arm.txt