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Merged
merged 2 commits into from
Dec 18, 2018
Merged

Nuvoton: Support boot stack size configuration option #9102

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244d4b6
[Nuvoton] Support boot stack size configuration option
ccli8 Dec 12, 2018
28b820f
[NANO130] Change main thread stack size to default for stack size uni…
ccli8 Dec 18, 2018
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21 changes: 10 additions & 11 deletions targets/TARGET_NUVOTON/TARGET_M2351/device/TOOLCHAIN_ARM_MICRO/M2351.sct
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Original file line number Diff line number Diff line change
Expand Up @@ -41,6 +41,10 @@
#define MBED_RAM_APP_SIZE (MBED_RAM_SIZE - MBED_RAM_SIZE_S)
#endif

#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif

#else

#ifndef MBED_APP_START
Expand All @@ -59,6 +63,10 @@
#define MBED_RAM_APP_SIZE MBED_RAM_SIZE_S
#endif

#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif

#endif

/* Requirements for NSC location
Expand All @@ -70,15 +78,6 @@
*/
#define NU_TZ_NSC_START (MBED_APP_START + MBED_APP_SIZE - 0x2000 - NU_TZ_NSC_SIZE)

/* Initial/ISR stack size */
#if (! defined(NU_INITIAL_STACK_SIZE))
#if defined(DOMAIN_NS) && DOMAIN_NS
#define NU_INITIAL_STACK_SIZE 0x800
#else
#define NU_INITIAL_STACK_SIZE 0x800
#endif
#endif

#if defined(DOMAIN_NS) && DOMAIN_NS

LR_IROM1 MBED_APP_START
Expand All @@ -91,7 +90,7 @@ LR_IROM1 MBED_APP_START
.ANY (+RO)
}

ARM_LIB_STACK MBED_RAM_APP_START EMPTY NU_INITIAL_STACK_SIZE
ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_BOOT_STACK_SIZE
{
}

Expand Down Expand Up @@ -129,7 +128,7 @@ LR_IROM1 MBED_APP_START
.ANY (+RO)
}

ARM_LIB_STACK 0x20000000 EMPTY NU_INITIAL_STACK_SIZE
ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE
{
}

Expand Down
21 changes: 10 additions & 11 deletions targets/TARGET_NUVOTON/TARGET_M2351/device/TOOLCHAIN_ARM_STD/M2351.sct
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Original file line number Diff line number Diff line change
Expand Up @@ -41,6 +41,10 @@
#define MBED_RAM_APP_SIZE (MBED_RAM_SIZE - MBED_RAM_SIZE_S)
#endif

#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif

#else

#ifndef MBED_APP_START
Expand All @@ -59,6 +63,10 @@
#define MBED_RAM_APP_SIZE MBED_RAM_SIZE_S
#endif

#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif

#endif

/* Requirements for NSC location
Expand All @@ -70,15 +78,6 @@
*/
#define NU_TZ_NSC_START (MBED_APP_START + MBED_APP_SIZE - 0x2000 - NU_TZ_NSC_SIZE)

/* Initial/ISR stack size */
#if (! defined(NU_INITIAL_STACK_SIZE))
#if defined(DOMAIN_NS) && DOMAIN_NS
#define NU_INITIAL_STACK_SIZE 0x800
#else
#define NU_INITIAL_STACK_SIZE 0x800
#endif
#endif

#if defined(DOMAIN_NS) && DOMAIN_NS

LR_IROM1 MBED_APP_START
Expand All @@ -91,7 +90,7 @@ LR_IROM1 MBED_APP_START
.ANY (+RO)
}

ARM_LIB_STACK MBED_RAM_APP_START EMPTY NU_INITIAL_STACK_SIZE
ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_BOOT_STACK_SIZE
{
}

Expand Down Expand Up @@ -129,7 +128,7 @@ LR_IROM1 MBED_APP_START
.ANY (+RO)
}

ARM_LIB_STACK 0x20000000 EMPTY NU_INITIAL_STACK_SIZE
ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE
{
}

Expand Down
28 changes: 16 additions & 12 deletions targets/TARGET_NUVOTON/TARGET_M2351/device/TOOLCHAIN_GCC_ARM/M2351.ld
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Original file line number Diff line number Diff line change
Expand Up @@ -28,47 +28,51 @@
#if defined(DOMAIN_NS) && DOMAIN_NS

#ifndef MBED_APP_START
#define MBED_APP_START (0x10000000 + MBED_ROM_START + MBED_ROM_SIZE_S)
#define MBED_APP_START (0x10000000 + MBED_ROM_START + MBED_ROM_SIZE_S)
#endif

#ifndef MBED_APP_SIZE
#define MBED_APP_SIZE (MBED_ROM_SIZE - MBED_ROM_SIZE_S)
#define MBED_APP_SIZE (MBED_ROM_SIZE - MBED_ROM_SIZE_S)
#endif

#ifndef MBED_RAM_APP_START
#define MBED_RAM_APP_START (0x10000000 + MBED_RAM_START + MBED_RAM_SIZE_S)
#define MBED_RAM_APP_START (0x10000000 + MBED_RAM_START + MBED_RAM_SIZE_S)
#endif

#ifndef MBED_RAM_APP_SIZE
#define MBED_RAM_APP_SIZE (MBED_RAM_SIZE - MBED_RAM_SIZE_S)
#define MBED_RAM_APP_SIZE (MBED_RAM_SIZE - MBED_RAM_SIZE_S)
#endif

#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif

#else

#ifndef MBED_APP_START
#define MBED_APP_START MBED_ROM_START
#define MBED_APP_START MBED_ROM_START
#endif

#ifndef MBED_APP_SIZE
#define MBED_APP_SIZE MBED_ROM_SIZE_S
#define MBED_APP_SIZE MBED_ROM_SIZE_S
#endif

#ifndef MBED_RAM_APP_START
#define MBED_RAM_APP_START MBED_RAM_START
#define MBED_RAM_APP_START MBED_RAM_START
#endif

#ifndef MBED_RAM_APP_SIZE
#define MBED_RAM_APP_SIZE MBED_RAM_SIZE_S
#define MBED_RAM_APP_SIZE MBED_RAM_SIZE_S
#endif

#ifndef MBED_BOOT_STACK_SIZE
#define MBED_BOOT_STACK_SIZE 0x400
#endif

#if defined(DOMAIN_NS) && DOMAIN_NS
StackSize = 0x800;
#else
StackSize = 0x800;
#endif

StackSize = MBED_BOOT_STACK_SIZE;

/* Requirements for NSC location
*
* 1. By IDAU, 0~0x4000 is secure. NSC can only locate in 0x4000~0x10000000.
Expand Down
12 changes: 10 additions & 2 deletions targets/TARGET_NUVOTON/TARGET_M2351/device/TOOLCHAIN_IAR/M2351.icf
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Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,10 @@ if (isdefinedsymbol(DOMAIN_NS)) {
define symbol MBED_RAM_APP_SIZE = (MBED_RAM_SIZE - MBED_RAM_SIZE_S);
}

if (! isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}

/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
/*-Memory Regions-*/
Expand All @@ -42,7 +46,7 @@ if (isdefinedsymbol(DOMAIN_NS)) {
define symbol __ICFEDIT_region_IRAM_end__ = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 1;

/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x800;
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x8000;

} else {
Expand All @@ -63,6 +67,10 @@ if (isdefinedsymbol(DOMAIN_NS)) {
define symbol MBED_RAM_APP_SIZE = MBED_RAM_SIZE_S;
}

if (! isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}

/* Requirements for NSC location
*
* 1. By IDAU, 0~0x4000 is secure. NSC can only locate in 0x4000~0x10000000.
Expand All @@ -87,7 +95,7 @@ if (isdefinedsymbol(DOMAIN_NS)) {
define symbol __ICFEDIT_region_IRAM_end__ = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 1;

/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x800;
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x4000;
}

Expand Down
13 changes: 11 additions & 2 deletions targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_MICRO/M453.sct
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Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,10 @@
#define MBED_APP_SIZE 0x00040000
#endif

#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif

LR_IROM1 MBED_APP_START {
ER_IROM1 MBED_APP_START { ; load address = execution address
*(RESET, +First)
Expand All @@ -16,10 +20,15 @@ LR_IROM1 MBED_APP_START {
}


ARM_LIB_STACK 0x20000000 EMPTY 0x800 {
ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE {
}

ER_IRAMVEC 0x20000800 EMPTY (4*(16 + 64)) { ; Reserve for vectors
/* VTOR[TBLOFF] alignment requires:
*
* 1. Minumum 32-word
* 2. Rounding up to the next power of two of table size
*/
ER_IRAMVEC AlignExpr(+0, 512) EMPTY (4*(16 + 64)) { ; Reserve for vectors
}

RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
Expand Down
15 changes: 12 additions & 3 deletions targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_STD/M453.sct
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Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,10 @@
#define MBED_APP_SIZE 0x00040000
#endif

#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif

LR_IROM1 MBED_APP_START {
ER_IROM1 MBED_APP_START { ; load address = execution address
*(RESET, +First)
Expand All @@ -16,10 +20,15 @@ LR_IROM1 MBED_APP_START {
}


ARM_LIB_STACK 0x20000000 EMPTY 0x800 {
ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE {
}

ER_IRAMVEC 0x20000800 EMPTY (4*(16 + 64)) { ; Reserve for vectors

/* VTOR[TBLOFF] alignment requires:
*
* 1. Minumum 32-word
* 2. Rounding up to the next power of two of table size
*/
ER_IRAMVEC AlignExpr(+0, 512) EMPTY (4*(16 + 64)) { ; Reserve for vectors
}

RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
Expand Down
6 changes: 5 additions & 1 deletion targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_GCC_ARM/M453.ld
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Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,11 @@
#define MBED_APP_SIZE 0x00040000
#endif

StackSize = 0x800;
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif

StackSize = MBED_BOOT_STACK_SIZE;

MEMORY
{
Expand Down
3 changes: 2 additions & 1 deletion targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf
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Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,7 @@
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; }
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00040000; }
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; }
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
/*-Memory Regions-*/
Expand All @@ -11,7 +12,7 @@ define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_IRAM_end__ = 0x20008000 - 1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x800;
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x4000;
/**** End of ICF editor section. ###ICF###*/

Expand Down
29 changes: 15 additions & 14 deletions targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct
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Original file line number Diff line number Diff line change
Expand Up @@ -8,33 +8,34 @@
#define MBED_APP_SIZE 0x00080000
#endif

#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif


#define SPIM_CCM_START 0x20020000
#define SPIM_CCM_END 0x20028000

#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x20000
#define MBED_STACK_RAM_START (MBED_RAM_START)
#define MBED_STACK_RAM_SIZE 0x800
#define MBED_VECTTABLE_RAM_START (MBED_STACK_RAM_START + MBED_STACK_RAM_SIZE)
#define MBED_VECTTABLE_RAM_SIZE (4*(16 + 96))
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100

LR_IROM1 MBED_APP_START {
ER_IROM1 MBED_APP_START { ; load address = execution address
*(RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}


ARM_LIB_STACK MBED_STACK_RAM_START EMPTY MBED_STACK_RAM_SIZE {

ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE {
}

ER_IRAMVEC MBED_VECTTABLE_RAM_START EMPTY MBED_VECTTABLE_RAM_SIZE { ; Reserve for vectors

/* VTOR[TBLOFF] alignment requires:
*
* 1. Minumum 32-word
* 2. Rounding up to the next power of two of table size
*/
ER_IRAMVEC AlignExpr(+0, 512) EMPTY (4*(16 + 96)) { ; Reserve for vectors
}

RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; Reserve for crash data storage
RW_m_crash_data AlignExpr(+0, 0x100) EMPTY 0x100 { ; Reserve for crash data storage
}

RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
Expand Down
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