Renesas : Add USB Device feature

targets/targets.json

@@ -4991,7 +4991,7 @@
         "supported_form_factors": ["ARDUINO"],
         "extra_labels_add": ["RZA1H", "MBRZA1H", "RZ_A1_EMAC"],
         "components_add": ["SD"],
-        "device_has_add": ["EMAC", "FLASH", "LPTICKER"],
+        "device_has_add": ["USBDEVICE", "EMAC", "FLASH", "LPTICKER"],
         "release_versions": ["2", "5"],
         "device_name": "R7S72100",
         "bootloader_supported": true
@@ -5007,7 +5007,7 @@
         "supported_form_factors": ["ARDUINO"],
         "extra_labels_add": ["RZA1UL", "MBRZA1LU"],
         "components_add": ["SD"],
-        "device_has_add": ["TRNG", "FLASH", "LPTICKER"],
+        "device_has_add": ["USBDEVICE", "TRNG", "FLASH", "LPTICKER"],
         "device_has_remove": ["ETHERNET"],
         "release_versions": ["2", "5"],
         "device_name": "R7S72103",

usb/device/targets/TARGET_RENESAS/TARGET_RZ_A1XX/USBEndpoints_RZ_A1.h

@@ -0,0 +1,84 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2018-2018 ARM Limited, All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#define NUMBER_OF_LOGICAL_ENDPOINTS (16)
+#define NUMBER_OF_PHYSICAL_ENDPOINTS (NUMBER_OF_LOGICAL_ENDPOINTS * 2)
+
+/* Define physical endpoint numbers */
+
+/*      Endpoint    No.     Type(s)   MaxSiz  DoubleBuf  pipe */
+/*      ----------------    --------- ------  ---------  ---- */
+#define EP0OUT   (0x00)  /* Control    256    No           0  */
+#define EP0IN    (0x80)  /* Control    256    No           0  */
+#define EP1OUT   (0x01)  /* Int         64    No           6  */
+#define EP1IN    (0x81)  /* Int         64    No           7  */
+#define EP2OUT   (0x02)  /* Bulk      2048    Yes          3  */
+#define EP2IN    (0x82)  /* Bulk      2048    Yes          4  */
+#define EP3OUT   (0x03)  /* Bulk/Iso  2048    Yes          1  */
+#define EP3IN    (0x83)  /* Bulk/Iso  2048    Yes          2  */
+/*following EP is not configured in sample program*/
+#define EP6IN    (0x86)  /* Bulk      2048    Yes          5  */
+#define EP8IN    (0x88)  /* Int        64     No           8  */
+#define EP9IN    (0x89)  /* Bulk       512    Bulk         9  */
+#define EP10IN   (0x8A)  /* Int/Bulk  2048    Bulk        10  */
+#define EP11IN   (0x8B)  /* Bulk      2048    Yes         11  */
+#define EP12IN   (0x8C)  /* Bulk      2048    Yes         12  */
+#define EP13IN   (0x8D)  /* Bulk      2048    Yes         13  */
+#define EP14IN   (0x8E)  /* Bulk      2048    Yes         14  */
+#define EP15IN   (0x8F)  /* Bulk      2048    Yes         15  */
+
+/* Maximum Packet sizes */
+#define MAX_PACKET_SIZE_EP0   (64)      /*pipe0/pipe0: control      */
+#define MAX_PACKET_SIZE_EP1   (64)      /*pipe6/pipe7: interrupt    */
+#define MAX_PACKET_SIZE_EP2  (512)      /*pipe3/pipe4: bulk         */
+#define MAX_PACKET_SIZE_EP3  (512)      /*pipe1/pipe2: isochronous  */
+#define MAX_PACKET_SIZE_EP6   (64)      /*pipe5:    Note *1 */
+#define MAX_PACKET_SIZE_EP8   (64)      /*pipe7:    Note *1 */
+#define MAX_PACKET_SIZE_EP9  (512)      /*pipe8:    Note *1 */
+#define MAX_PACKET_SIZE_EP10 (512)      /*pipe9:    Note *1 */
+#define MAX_PACKET_SIZE_EP11 (512)      /*pipe10:   Note *1 */
+#define MAX_PACKET_SIZE_EP12 (512)      /*pipe11:   Note *1 */
+#define MAX_PACKET_SIZE_EP13 (512)      /*pipe12:   Note *1 */
+#define MAX_PACKET_SIZE_EP14 (512)      /*pipe13:   Note *1 */
+#define MAX_PACKET_SIZE_EP15 (512)      /*pipe14:   Note *1 */
+/* Note *1: This pipe is not configure in sample program */
+
+
+/* Generic endpoints - intended to be portable accross devices */
+/* and be suitable for simple USB devices. */
+
+/* Bulk endpoints */
+#define EPBULK_OUT  (EP2OUT)
+#define EPBULK_IN   (EP2IN)
+#define EPBULK_OUT_callback   EP2_OUT_callback
+#define EPBULK_IN_callback    EP2_IN_callback
+/* Interrupt endpoints */
+#define EPINT_OUT   (EP1OUT)
+#define EPINT_IN    (EP1IN)
+#define EPINT_OUT_callback    EP1_OUT_callback
+#define EPINT_IN_callback     EP1_IN_callback
+/* Isochronous endpoints */
+#define EPISO_OUT   (EP3OUT)
+#define EPISO_IN    (EP3IN)
+#define EPISO_OUT_callback    EP3_OUT_callback
+#define EPISO_IN_callback     EP3_IN_callback
+
+#define MAX_PACKET_SIZE_EPBULK  (MAX_PACKET_SIZE_EP2)
+#define MAX_PACKET_SIZE_EPINT   (MAX_PACKET_SIZE_EP1)
+#define MAX_PACKET_SIZE_EPISO   (MAX_PACKET_SIZE_EP3)
+
+/*EOF*/

usb/device/targets/TARGET_RENESAS/TARGET_RZ_A1XX/USBPhyHw.h

@@ -0,0 +1,106 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2018-2018 ARM Limited, All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef USBPHYHW_H
+#define USBPHYHW_H
+
+#include "mbed.h"
+#include "USBPhy.h"
+
+
+class USBPhyHw : public USBPhy {
+public:
+    USBPhyHw();
+    virtual ~USBPhyHw();
+    virtual void init(USBPhyEvents *events);
+    virtual void deinit();
+    virtual bool powered();
+    virtual void connect();
+    virtual void disconnect();
+    virtual void configure();
+    virtual void unconfigure();
+    virtual void sof_enable();
+    virtual void sof_disable();
+    virtual void set_address(uint8_t address);
+    virtual void remote_wakeup();
+    virtual const usb_ep_table_t* endpoint_table();
+
+    virtual uint32_t ep0_set_max_packet(uint32_t max_packet);
+    virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size);
+    virtual void ep0_read(uint8_t *data, uint32_t size);
+    virtual uint32_t ep0_read_result();
+    virtual void ep0_write(uint8_t *buffer, uint32_t size);
+    virtual void ep0_stall();
+
+    virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type);
+    virtual void endpoint_remove(usb_ep_t endpoint);
+    virtual void endpoint_stall(usb_ep_t endpoint);
+    virtual void endpoint_unstall(usb_ep_t endpoint);
+
+    virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size);
+    virtual uint32_t endpoint_read_result(usb_ep_t endpoint);
+    virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size);
+    virtual void endpoint_abort(usb_ep_t endpoint);
+
+    virtual void process();
+
+private:
+    #define PIPE_NUM      (16)
+
+    typedef struct {
+        bool        enable;
+        uint16_t    status;
+        uint32_t    req_size;
+        uint32_t    data_cnt;
+        uint8_t     *p_data;
+    } pipe_ctrl_t;
+
+    USBPhyEvents *events;
+    pipe_ctrl_t pipe_ctrl[PIPE_NUM];
+    uint16_t setup_buffer[32];
+
+    static void _usbisr(void);
+    void chg_curpipe(uint16_t pipe, uint16_t isel);
+    uint16_t is_set_frdy(uint16_t pipe, uint16_t isel);
+    uint8_t * read_fifo(uint16_t pipe, uint16_t count, uint8_t *read_p);
+    uint16_t read_data(uint16_t pipe);
+    void fifo_to_buf(uint16_t pipe);
+    uint8_t * write_fifo(uint16_t pipe, uint16_t count, uint8_t *write_p);
+    uint16_t write_data(uint16_t pipe);
+    void buf_to_fifo(uint16_t pipe);
+    uint16_t * get_pipectr_reg(uint16_t pipe);
+    uint16_t * get_pipetre_reg(uint16_t pipe);
+    uint16_t * get_pipetrn_reg(uint16_t pipe);
+    uint16_t * get_fifoctr_reg(uint16_t pipe);
+    uint16_t * get_fifosel_reg(uint16_t pipe);
+    uint32_t * get_fifo_reg(uint16_t pipe);
+    uint16_t get_pid(uint16_t pipe);
+    void set_mbw(uint16_t pipe, uint16_t data);
+    void set_pid(uint16_t pipe, uint16_t new_pid);
+    void cpu_delay_1us(uint16_t time);
+    uint16_t EP2PIPE(uint16_t endpoint);
+    uint16_t PIPE2EP(uint16_t pipe);
+    uint16_t PIPE2FIFO(uint16_t pipe);
+    void reset_usb(uint16_t clockmode);
+    bool chk_vbsts(void);
+    void ctrl_end(uint16_t status);
+    void data_end(uint16_t pipe, uint16_t status);
+    void forced_termination(uint16_t pipe, uint16_t status);
+
+};
+
+#endif