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Merged
merged 24 commits into from
Feb 26, 2019
Merged

IAR 8 feature branch merge #9808

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84f52a8
adding updated binary for IAR v8.32
aqib-ublox Jan 31, 2019
b91dbab
Add Dynamic heap support to IAR
Aug 22, 2017
334b2d6
Update params in calls to LDREXW/STREXW to uint32_t
Oct 30, 2017
ea3fa02
Splited RAM section not compatible with dynamic HEAP.
Oct 31, 2017
0ff6f99
Remove IAR supported from targets failing IAR 8.32 build
Jan 28, 2019
5501947
Update IAR project template as per IAR 8.32
Jan 8, 2019
e54be4a
Add Dynamic heap support to IAR
Dec 27, 2018
3fd5f53
Dynamic heap support will be breaking change for all targets in IAR 7.x
Feb 6, 2019
d67536d
Target_PSOC6 - Remove IAR supported from targets failing IAR 8.32 build
Feb 13, 2019
270827b
Enable ODIN boards
Feb 15, 2019
f7a6d25
rand() by default does increment of 1, randomizing more
Feb 22, 2019
1a2f673
Disable the cypress targets explicitly instead of base targets
Feb 25, 2019
f4e0031
Merge pull request #9841 from deepikabhavnani/explicit_disable
Feb 25, 2019
f33fc3a
Set IAR version as 8.32 in tools
Feb 22, 2019
d2e1196
Revert "rand() by default does increment of 1, randomizing more"
Feb 26, 2019
c07ba7c
Enhance targets.json with components
Feb 26, 2019
b8fed58
Modifing general block device tests doe to targets enhancement
Feb 26, 2019
6d04fa7
Add IAR8 binaries for USI_WM_BN_BM_22 and EMW3166 based chips
Feb 26, 2019
1ad2343
Remove IAR from required toolchains list
Feb 26, 2019
915424a
Enable Cypress for Mbed 5 release
Feb 26, 2019
5c7f6cb
Merge SPIF & QSPIF components test to general block device tests
Feb 26, 2019
e0b4b51
Revert "Update params in calls to LDREXW/STREXW to uint32_t"
Feb 26, 2019
74d8315
Merge pull request #9858 from deepikabhavnani/roll_up_iar8
Feb 26, 2019
e64286b
Merge pull request #9863 from deepikabhavnani/old_commit_revert
Feb 26, 2019
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5 changes: 3 additions & 2 deletions components/storage/blockdevice/COMPONENT_SPIF/TESTS/block_device/spif/main.cpp
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Expand Up @@ -49,8 +49,9 @@ void basic_erase_program_read_test(SPIFBlockDevice &block_device, bd_size_t bloc
_mutex->lock();

// Make sure block address per each test is unique
static unsigned block_seed = 1;
srand(block_seed++);
static unsigned block_seed = SPIF_TEST_NUM_OF_THREADS;
srand(block_seed);
block_seed += 2;

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Please see #9855
SPIF and QSPIF tests were removed (merged fully into general block device tests)

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@deepikabhavnani deepikabhavnani Feb 26, 2019 •
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@theamirocohen We have created a Roll up PR to revert this fix and add storage changes to feature branch
#9858 - Do we need to add #9855 as well to that?

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Sounds good to me

// Find a random block
bd_addr_t block = (rand() * block_size) % block_device.size();
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5 changes: 3 additions & 2 deletions features/storage/TESTS/blockdevice/general_block_device/main.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -189,8 +189,9 @@ void basic_erase_program_read_test(BlockDevice *block_device, bd_size_t block_si
_mutex->lock();

// Make sure block address per each test is unique
static unsigned block_seed = 1;
srand(block_seed++);
static unsigned block_seed = TEST_NUM_OF_THREADS;
srand(block_seed);
block_seed += 2;

// Find a random block
bd_addr_t block = (rand() * block_size) % (block_device->size());
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8 changes: 4 additions & 4 deletions targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_def.h
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Expand Up @@ -130,19 +130,19 @@ static inline void atomic_set_u32(volatile uint32_t *ptr, uint32_t mask)
{
uint32_t newValue;
do {
newValue = (uint32_t)__LDREXW(ptr) | mask;
newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) | mask;
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@ARMmbed/team-st-mcd FYI

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I can't see what this change is doing. You're casting something to its own type.

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This fix was added to feature branch more then a year ago. With updates to master and ST hal updates it is now irrelevant :-(
@0xc0170 - Shall i revert this as well?

Can see some fixes on similar terms on master c5a5438

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Looks like a bad conflict resolution of that then - there was a long versus uint32_t mismatch, but that's gone now


} while (__STREXW(newValue, ptr));
} while (__STREXW(newValue,(volatile uint32_t *) ptr));
}


static inline void atomic_clr_u32(volatile uint32_t *ptr, uint32_t mask)
{
uint32_t newValue;
do {
newValue = (uint32_t)__LDREXW(ptr) &~mask;
newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) &~mask;

} while (__STREXW(newValue, ptr));
} while (__STREXW(newValue,(volatile uint32_t *) ptr));
}

#if defined ( __GNUC__ ) && !defined ( __CC_ARM )
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8 changes: 4 additions & 4 deletions targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_def.h
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Original file line number Diff line number Diff line change
Expand Up @@ -133,19 +133,19 @@ static inline void atomic_set_u32(volatile uint32_t *ptr, uint32_t mask)
{
uint32_t newValue;
do {
newValue = (uint32_t)__LDREXW(ptr) | mask;
newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) | mask;

} while (__STREXW(newValue, ptr));
} while (__STREXW(newValue,(volatile uint32_t *) ptr));
}

// MBED patch
static inline void atomic_clr_u32(volatile uint32_t *ptr, uint32_t mask)
{
uint32_t newValue;
do {
newValue = (uint32_t)__LDREXW(ptr) &~mask;
newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) &~mask;

} while (__STREXW(newValue, ptr));
} while (__STREXW(newValue,(volatile uint32_t *) ptr));
}

// MBED patch
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Binary file modified ...ARGET_STM32F439xI/TARGET_MODULE_UBLOX_ODIN_W2/sdk/TOOLCHAIN_IAR/libublox-odin-w2-driver.a
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8 changes: 4 additions & 4 deletions targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_def.h
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Original file line number Diff line number Diff line change
Expand Up @@ -131,19 +131,19 @@ static inline void atomic_set_u32(volatile uint32_t *ptr, uint32_t mask)
{
uint32_t newValue;
do {
newValue = (uint32_t)__LDREXW(ptr) | mask;
newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) | mask;

} while (__STREXW(newValue, ptr));
} while (__STREXW(newValue,(volatile uint32_t *) ptr));
}


static inline void atomic_clr_u32(volatile uint32_t *ptr, uint32_t mask)
{
uint32_t newValue;
do {
newValue = (uint32_t)__LDREXW(ptr) &~mask;
newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) &~mask;

} while (__STREXW(newValue, ptr));
} while (__STREXW(newValue,(volatile uint32_t *) ptr));
}
/* MBED */

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8 changes: 4 additions & 4 deletions targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_def.h
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Original file line number Diff line number Diff line change
Expand Up @@ -130,19 +130,19 @@ static inline void atomic_set_u32(volatile uint32_t *ptr, uint32_t mask)
{
uint32_t newValue;
do {
newValue = (uint32_t)__LDREXW(ptr) | mask;
newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) | mask;

} while (__STREXW(newValue, ptr));
} while (__STREXW(newValue,(volatile uint32_t *) ptr));
}


static inline void atomic_clr_u32(volatile uint32_t *ptr, uint32_t mask)
{
uint32_t newValue;
do {
newValue = (uint32_t)__LDREXW(ptr) &~mask;
newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) &~mask;

} while (__STREXW(newValue, ptr));
} while (__STREXW(newValue,(volatile uint32_t *) ptr));
}

#if defined ( __GNUC__ ) && !defined ( __CC_ARM )
Expand Down
8 changes: 4 additions & 4 deletions targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_def.h
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Original file line number Diff line number Diff line change
Expand Up @@ -133,19 +133,19 @@ static inline void atomic_set_u32(volatile uint32_t *ptr, uint32_t mask)
{
uint32_t newValue;
do {
newValue = (uint32_t)__LDREXW(ptr) | mask;
newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) | mask;

} while (__STREXW(newValue, ptr));
} while (__STREXW(newValue,(volatile uint32_t *) ptr));
}

// Added for MBED PR #3062
static inline void atomic_clr_u32(volatile uint32_t *ptr, uint32_t mask)
{
uint32_t newValue;
do {
newValue = (uint32_t)__LDREXW(ptr) &~mask;
newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) &~mask;

} while (__STREXW(newValue, ptr));
} while (__STREXW(newValue,(volatile uint32_t *) ptr));
}

#if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
Expand Down
20 changes: 15 additions & 5 deletions targets/targets.json
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Original file line number Diff line number Diff line change
Expand Up @@ -2479,6 +2479,7 @@
},
"MTB_MXCHIP_EMW3166": {
"inherits": ["FAMILY_STM32"],
"supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
"core": "Cortex-M4F",
"extra_labels_add": [
"STM32F4",
Expand All @@ -2495,7 +2496,7 @@
"FLASH",
"MPU"
],
"release_versions": ["5"],
"release_versions": [],
"device_name": "STM32F412ZG",
"bootloader_supported": true,
"config": {
Expand All @@ -2511,6 +2512,7 @@
},
"USI_WM_BN_BM_22": {
"inherits": ["FAMILY_STM32"],
"supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
"components_add": ["SPIF", "FLASHIAP"],
"core": "Cortex-M4F",
"extra_labels_add": [
Expand All @@ -2529,7 +2531,7 @@
"FLASH",
"MPU"
],
"release_versions": ["5"],
"release_versions": [],
"device_name": "STM32F412ZG",
"bootloader_supported": true,
"public": false,
Expand Down Expand Up @@ -7327,12 +7329,12 @@
"FLASH"
],
"public": false,
"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
"supported_toolchains": ["GCC_ARM", "ARM"],
"post_binary_hook": {
"function": "RTL8195ACode.binary_hook",
"toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
},
"release_versions": ["5"],
"release_versions": [],
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this should still have version 5 ?

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If it does, I think it should come in via a followup PR, considering how much this PR is blocking.

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just final check :) LGTM

"overrides": {
"network-default-interface-type": "WIFI"
}
Expand Down Expand Up @@ -7878,7 +7880,7 @@
"inherits": ["Target"],
"macros": ["MBED_MPU_CUSTOM"],
"default_toolchain": "GCC_ARM",
"supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
"core": "Cortex-M4F",
"OUTPUT_EXT": "hex",
"device_has": [
Expand Down Expand Up @@ -7924,6 +7926,8 @@
"inherits": ["MCU_PSOC6_M4"],
"features": ["BLE"],
"supported_form_factors": ["ARDUINO"],
"supported_toolchains": ["GCC_ARM", "ARM"],
"release_versions": [""],
"extra_labels_add": ["PSOC6_01", "WICED", "CYW43XXX", "CYW4343X", "CORDIO"],
"macros_add": ["CY8C6247BZI_D54", "PSOC6_DYNSRM_DISABLE=1"],
"detect_code": ["1900"],
Expand All @@ -7939,6 +7943,8 @@
"inherits": ["MCU_PSOC6_M4"],
"features": ["BLE"],
"device_has_remove": ["ANALOGOUT"],
"supported_toolchains": ["GCC_ARM", "ARM"],
"release_versions": [""],
"extra_labels_add": ["PSOC6_02", "WICED", "CYW43XXX", "CYW4343X", "CORDIO"],
"macros_add": ["CY8C624ABZI_D44", "PSOC6_DYNSRM_DISABLE=1"],
"public": false,
Expand Down Expand Up @@ -7967,6 +7973,8 @@
},
"CY8CKIT_062_4343W": {
"inherits": ["MCU_PSOC6_M4"],
"supported_toolchains": ["GCC_ARM", "ARM"],
"release_versions": [""],
"features": ["BLE"],
"supported_form_factors": ["ARDUINO"],
"device_has_remove": ["ANALOGOUT"],
Expand All @@ -7984,6 +7992,8 @@
"CYW943012P6EVB_01": {
"inherits": ["MCU_PSOC6_M4"],
"features": ["BLE"],
"supported_toolchains": ["GCC_ARM", "ARM"],
"release_versions": [""],
"extra_labels_add": ["PSOC6_01", "WICED", "CYW43XXX", "CYW43012", "CORDIO"],
"macros_add": ["CY8C6247BZI_D54", "PSOC6_DYNSRM_DISABLE=1"],
"detect_code": ["1906"],
Expand Down
8 changes: 7 additions & 1 deletion tools/export/iar/__init__.py
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Original file line number Diff line number Diff line change
Expand Up @@ -86,8 +86,9 @@ def iar_device(self):
"CExtraOptionsCheck": 0,
"CExtraOptions": "",
"CMSISDAPJtagSpeedList": 0,
"DSPExtension": 0,
"TrustZone": 0,
}

iar_defaults.update(device_info)
IARdevice = namedtuple('IARdevice', iar_defaults.keys())
return IARdevice(**iar_defaults)
Expand Down Expand Up @@ -126,6 +127,10 @@ def generate(self):
except TargetNotSupportedException:
debugger = "CMSISDAP"

trustZoneMode = 0
if self.toolchain.target.core.endswith("-NS"):
trustZoneMode = 1

ctx = {
'name': self.project_name,
'groups': self.iar_groups(self.format_src(srcs)),
Expand All @@ -134,6 +139,7 @@ def generate(self):
'device': self.iar_device(),
'ewp': sep+self.project_name + ".ewp",
'debugger': debugger,
'trustZoneMode': trustZoneMode,
}
ctx.update(flags)

Expand Down
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