Expanded intel_device_info output

dpctl/tests/test_utils.py

@@ -141,6 +141,9 @@ def test_intel_device_info():
         "gpu_subslices_per_slice",
         "gpu_eu_count_per_subslice",
         "max_mem_bandwidth",
+        "free_memory",
+        "memory_clock_rate",
+        "memory_bus_width",
     ]
     for descriptor_name in descr.keys():
         test = descriptor_name in allowed_names

dpctl/utils/__init__.py

@@ -27,13 +27,16 @@
 )
 from ._device_queries import (
     intel_device_info_device_id,
+    intel_device_info_free_memory,
     intel_device_info_gpu_eu_count,
     intel_device_info_gpu_eu_count_per_subslice,
     intel_device_info_gpu_eu_simd_width,
     intel_device_info_gpu_hw_threads_per_eu,
     intel_device_info_gpu_slices,
     intel_device_info_gpu_subslices_per_slice,
     intel_device_info_max_mem_bandwidth,
+    intel_device_info_memory_bus_width,
+    intel_device_info_memory_clock_rate,
 )
 from ._onetrace_context import onetrace_enabled
 
@@ -62,11 +65,17 @@ def intel_device_info(dev, /):
         Number of EUs in subslice
     max_mem_bandwidth:
         Maximum memory bandwidth in bytes/second
+    free_memory:
+        Global memory available on the device in units of bytes
 
     Unsupported descriptors are omitted from the dictionary.
 
     Descriptors other than the PCI identifier are supported only
     for :class:`.SyclDevices` with Level-Zero backend.
+
+    .. note::
+        Environment variable ``ZES_ENABLE_SYSMAN`` may need to be set
+        to ``1`` for the ``"free_memory"`` key to be reported.
     """
     if not isinstance(dev, SyclDevice):
         raise TypeError(f"Expected dpctl.SyclDevice, got {type(dev)}")
@@ -97,6 +106,15 @@ def intel_device_info(dev, /):
         bw = intel_device_info_max_mem_bandwidth(dev)
         if bw:
             res["max_mem_bandwidth"] = bw
+        fm = intel_device_info_free_memory(dev)
+        if fm:
+            res["free_memory"] = fm
+        mcr = intel_device_info_memory_clock_rate(dev)
+        if mcr:
+            res["memory_clock_rate"] = mcr
+        mbw = intel_device_info_memory_bus_width(dev)
+        if mbw:
+            res["memory_bus_width"] = mbw
         return res
     return dict()
 

dpctl/utils/src/device_queries.cpp

@@ -100,6 +100,36 @@ std::uint64_t py_intel_max_mem_bandwidth(const sycl::device &d)
     return bandwidth_unavailable;
 }
 
+std::uint64_t py_intel_free_memory(const sycl::device &d)
+{
+    static constexpr std::uint64_t free_memory_unavailable = 0;
+
+    if (d.has(sycl::aspect::ext_intel_free_memory)) {
+        return d.get_info<sycl::ext::intel::info::device::free_memory>();
+    }
+    return free_memory_unavailable;
+}
+
+std::uint32_t py_intel_memory_clock_rate(const sycl::device &d)
+{
+    static constexpr std::uint32_t rate_unavailable = 0;
+
+    if (d.has(sycl::aspect::ext_intel_memory_clock_rate)) {
+        return d.get_info<sycl::ext::intel::info::device::memory_clock_rate>();
+    }
+    return rate_unavailable;
+}
+
+std::uint32_t py_intel_memory_bus_width(const sycl::device &d)
+{
+    static constexpr std::uint32_t width_unavailable = 0;
+
+    if (d.has(sycl::aspect::ext_intel_memory_bus_width)) {
+        return d.get_info<sycl::ext::intel::info::device::memory_bus_width>();
+    }
+    return width_unavailable;
+}
+
 }; // namespace
 
 PYBIND11_MODULE(_device_queries, m)
@@ -136,4 +166,16 @@ PYBIND11_MODULE(_device_queries, m)
     m.def("intel_device_info_max_mem_bandwidth", &py_intel_max_mem_bandwidth,
           "Returns the maximum memory bandwidth in units of bytes/second.",
           py::arg("device"));
+
+    m.def("intel_device_info_free_memory", &py_intel_free_memory,
+          "Returns the memory available on the device in units of bytes.",
+          py::arg("device"));
+
+    m.def("intel_device_info_memory_clock_rate", &py_intel_memory_clock_rate,
+          "Returns the maximum clock rate of device's global memory in MHz.",
+          py::arg("device"));
+
+    m.def("intel_device_info_memory_bus_width", &py_intel_memory_bus_width,
+          "Returns the maximum bus width between device and memory in bits.",
+          py::arg("device"));
 }