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Update the ABI to support Floating-Point Exceptions. #5164

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2 changes: 1 addition & 1 deletion docs/build/arm64-windows-abi-conventions.md
Original file line number Diff line number Diff line change
Expand Up @@ -118,7 +118,7 @@ Like AArch32, the AArch64 specification provides three system-controlled "thread

## Floating-point exceptions

Support for IEEE floating-point exceptions is optional on AArch64 systems. For processor variants that do have hardware floating-point exceptions, the Windows kernel silently catches the exceptions and implicitly disables them in the FPCR register. This trap ensures normalized behavior across processor variants. Otherwise, code developed on a platform without exception support may find itself taking unexpected exceptions when running on a platform with support.
Support for IEEE floating-point exceptions on AArch64 systems is optional. This can be verified by writing a value that enables exceptions to the `FPCR` register and then reading it back. The bits corresponding to supported exceptions will remain set, while the bits corresponding to unsupported exceptions will be reset by the CPU.

## Parameter passing

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