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petechouigcbot
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[Autobackout][FuncReg]Revert of change: c55fed4
minor code refactoring. minor code refactoring.
1 parent 9b6dc25 commit 58f0139

16 files changed

+196
-203
lines changed

visa/BuildIR.h

Lines changed: 5 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1470,18 +1470,16 @@ class IR_Builder {
14701470

14711471
G4_INST *createDpasInst(G4_opcode opc, G4_ExecSize execSize,
14721472
G4_DstRegRegion *dst, G4_Operand *src0,
1473-
G4_Operand *src1, G4_Operand *src2,
1474-
G4_Operand *src3, G4_Operand *src4,
1473+
G4_Operand *src1, G4_Operand *src2, G4_Operand *src3,
14751474
G4_InstOpts options, GenPrecision A, GenPrecision W,
14761475
uint8_t D, uint8_t C, bool addToInstList);
14771476

14781477
G4_INST *createInternalDpasInst(G4_opcode opc, G4_ExecSize execSize,
14791478
G4_DstRegRegion *dst, G4_Operand *src0,
14801479
G4_Operand *src1, G4_Operand *src2,
1481-
G4_InstOpts options, GenPrecision A,
1482-
GenPrecision W, uint8_t D, uint8_t C,
1483-
G4_Operand *src3 = nullptr,
1484-
G4_Operand *src4 = nullptr);
1480+
G4_Operand *src3, G4_InstOpts options,
1481+
GenPrecision A, GenPrecision W, uint8_t D,
1482+
uint8_t C);
14851483

14861484
G4_INST *createBfnInst(uint8_t booleanFuncCtrl, G4_Predicate *prd,
14871485
G4_CondMod *mod, G4_Sat sat, G4_ExecSize execSize,
@@ -1533,8 +1531,7 @@ class IR_Builder {
15331531
G4_SrcRegRegion *src0Opnd,
15341532
G4_SrcRegRegion *src1Opnd,
15351533
G4_SrcRegRegion *src2Opnd,
1536-
G4_SrcRegRegion *src3Opnd,
1537-
G4_SrcRegRegion *src4Opnd, GenPrecision A,
1534+
G4_SrcRegRegion *src3Opnd, GenPrecision A,
15381535
GenPrecision W, uint8_t D, uint8_t C);
15391536
int translateVISABfnInst(uint8_t booleanFuncCtrl,
15401537
VISA_Exec_Size executionSize, VISA_EMask_Ctrl emask,

visa/BuildIRImpl.cpp

Lines changed: 10 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1772,12 +1772,11 @@ G4_INST *IR_Builder::createCFInst(G4_Predicate *prd, G4_opcode op,
17721772
G4_INST *IR_Builder::createDpasInst(G4_opcode opc, G4_ExecSize execSize,
17731773
G4_DstRegRegion *dst, G4_Operand *src0,
17741774
G4_Operand *src1, G4_Operand *src2,
1775-
G4_Operand *src3, G4_Operand *src4,
1776-
G4_InstOpts options, GenPrecision A,
1777-
GenPrecision W, uint8_t D, uint8_t C,
1778-
bool addToInstList) {
1775+
G4_Operand *src3, G4_InstOpts options,
1776+
GenPrecision A, GenPrecision W, uint8_t D,
1777+
uint8_t C, bool addToInstList) {
17791778
G4_INST *i = new (mem) G4_InstDpas(*this, opc, execSize, dst, src0, src1,
1780-
src2, src3, src4, options, A, W, D, C);
1779+
src2, src3, options, A, W, D, C);
17811780

17821781
if (addToInstList) {
17831782
i->setVISAId(curCISAOffset);
@@ -1794,10 +1793,12 @@ G4_INST *IR_Builder::createDpasInst(G4_opcode opc, G4_ExecSize execSize,
17941793

17951794
G4_INST *IR_Builder::createInternalDpasInst(
17961795
G4_opcode opc, G4_ExecSize execSize, G4_DstRegRegion *dst, G4_Operand *src0,
1797-
G4_Operand *src1, G4_Operand *src2, G4_InstOpts options, GenPrecision A,
1798-
GenPrecision W, uint8_t D, uint8_t C, G4_Operand *src3, G4_Operand *src4) {
1799-
return createDpasInst(opc, execSize, dst, src0, src1, src2, src3, src4,
1800-
options, A, W, D, C, false);
1796+
G4_Operand *src1, G4_Operand *src2, G4_Operand *src3, G4_InstOpts options,
1797+
GenPrecision A, GenPrecision W, uint8_t D, uint8_t C) {
1798+
auto ii = createDpasInst(opc, execSize, dst, src0, src1, src2, nullptr,
1799+
options, A, W, D, C, false);
1800+
1801+
return ii;
18011802
}
18021803

18031804
G4_INST *IR_Builder::createBfnInst(uint8_t booleanFuncCtrl, G4_Predicate *prd,

visa/G4_IR.cpp

Lines changed: 73 additions & 72 deletions
Original file line numberDiff line numberDiff line change
@@ -206,20 +206,6 @@ G4_INST::G4_INST(const IR_Builder &irb, G4_Predicate *prd, G4_opcode o,
206206
initOperands();
207207
}
208208

209-
G4_INST::G4_INST(const IR_Builder &irb, G4_Predicate *prd, G4_opcode o,
210-
G4_CondMod *m, G4_Sat s, G4_ExecSize size, G4_DstRegRegion *d,
211-
G4_Operand *s0, G4_Operand *s1, G4_Operand *s2, G4_Operand *s3,
212-
G4_Operand *s4, G4_InstOpts opt)
213-
: op(o), dst(d), predicate(prd), mod(m), option(opt),
214-
useInstList(irb.getAllocator()), defInstList(irb.getAllocator()),
215-
sat(s ? true : false), dead(false), evenlySplitInst(false),
216-
doPostRA(false), canBeAcc(false), doNotDelete(false), execSize(size),
217-
builder(irb) {
218-
vISA_ASSERT(isDpas(), "Currently only dpas variants support 5 srcs");
219-
srcs = {s0, s1, s2, s3, s4};
220-
initOperands();
221-
}
222-
223209
G4_INST::G4_INST(const IR_Builder &irb, G4_Predicate *prd, G4_opcode o,
224210
G4_CondMod *m, G4_Sat s, G4_ExecSize size, G4_DstRegRegion *d,
225211
G4_Operand *s0, G4_Operand *s1, G4_Operand *s2, G4_Operand *s3,
@@ -2696,19 +2682,26 @@ bool G4_INST::goodTwoGRFDst(bool &evenSplitDst) const {
26962682
// propagation
26972683
bool G4_INST::isWARdep(G4_INST *inst) {
26982684
G4_Operand *msg0 = NULL;
2685+
G4_Operand *src0_0 = inst->getSrc(0);
2686+
G4_Operand *src0_1 = inst->getSrc(1);
2687+
G4_Operand *src0_2 = inst->getSrc(2);
2688+
G4_Operand *src0_3 = inst->getSrc(3);
26992689
G4_Operand *implicitSrc0 = inst->getImplAccSrc();
27002690
G4_Predicate *pred0 = inst->getPredicate();
27012691

27022692
G4_Operand *dst1 = dst;
27032693

27042694
if (dst1 && !hasNULLDst()) {
27052695

2706-
if (std::any_of(inst->src_begin(), inst->src_end(), [&](G4_Operand *src) {
2707-
return src->compareOperand(dst1, getBuilder()) != Rel_disjoint;
2708-
}))
2709-
return true;
2710-
2711-
if ((msg0 && (msg0->compareOperand(dst1, getBuilder()) != Rel_disjoint)) ||
2696+
if ((src0_0 &&
2697+
src0_0->compareOperand(dst1, getBuilder()) != Rel_disjoint) ||
2698+
(src0_1 &&
2699+
src0_1->compareOperand(dst1, getBuilder()) != Rel_disjoint) ||
2700+
(src0_2 &&
2701+
src0_2->compareOperand(dst1, getBuilder()) != Rel_disjoint) ||
2702+
(src0_3 &&
2703+
src0_3->compareOperand(dst1, getBuilder()) != Rel_disjoint) ||
2704+
(msg0 && (msg0->compareOperand(dst1, getBuilder()) != Rel_disjoint)) ||
27122705
(pred0 &&
27132706
(pred0->compareOperand(dst1, getBuilder()) != Rel_disjoint)) ||
27142707
(implicitSrc0 &&
@@ -2718,27 +2711,29 @@ bool G4_INST::isWARdep(G4_INST *inst) {
27182711
}
27192712

27202713
if (mod) {
2721-
if (pred0 && pred0->compareOperand(mod, getBuilder()) != Rel_disjoint)
2722-
return true;
2723-
2724-
if (std::any_of(inst->src_begin(), inst->src_end(), [&](G4_Operand *src) {
2725-
return src->isFlag() &&
2726-
src->compareOperand(mod, getBuilder()) != Rel_disjoint;
2727-
}))
2714+
if ((pred0 && pred0->compareOperand(mod, getBuilder()) != Rel_disjoint) ||
2715+
(src0_0 && src0_0->isFlag() &&
2716+
src0_0->compareOperand(mod, getBuilder()) != Rel_disjoint) ||
2717+
(src0_1 && src0_1->isFlag() &&
2718+
src0_1->compareOperand(mod, getBuilder()) != Rel_disjoint) ||
2719+
(src0_2 && src0_2->isFlag() &&
2720+
src0_2->compareOperand(mod, getBuilder()) != Rel_disjoint)) {
27282721
return true;
2722+
}
27292723
}
27302724

27312725
auto implAccDst = getImplAccDst();
27322726
if (implAccDst) {
2733-
if (implicitSrc0 && implicitSrc0->compareOperand(
2734-
implAccDst, getBuilder()) != Rel_disjoint)
2735-
return true;
2736-
2737-
if (std::any_of(inst->src_begin(), inst->src_end(), [&](G4_Operand *src) {
2738-
return src->isAccReg() &&
2739-
src->compareOperand(implAccDst, getBuilder()) != Rel_disjoint;
2740-
}))
2727+
if ((implicitSrc0 && implicitSrc0->compareOperand(
2728+
implAccDst, getBuilder()) != Rel_disjoint) ||
2729+
(src0_0 && src0_0->isAccReg() &&
2730+
src0_0->compareOperand(implAccDst, getBuilder()) != Rel_disjoint) ||
2731+
(src0_1 && src0_1->isAccReg() &&
2732+
src0_1->compareOperand(implAccDst, getBuilder()) != Rel_disjoint) ||
2733+
(src0_2 && src0_2->isAccReg() &&
2734+
src0_2->compareOperand(implAccDst, getBuilder()) != Rel_disjoint)) {
27412735
return true;
2736+
}
27422737
}
27432738
return false;
27442739
}
@@ -2788,46 +2783,52 @@ bool G4_INST::isRAWdep(G4_INST *inst) {
27882783
G4_CondMod *cMod0 = inst->getCondMod();
27892784
G4_Operand *implicitDst0 = inst->getImplAccDst();
27902785
G4_Predicate *pred1 = getPredicate();
2786+
G4_Operand *src1_0 = getSrc(0);
2787+
G4_Operand *src1_1 = getSrc(1);
2788+
G4_Operand *src1_2 = getSrc(2);
2789+
G4_Operand *src1_3 = getSrc(3);
27912790
G4_Operand *implicitSrc1 = getImplAccSrc();
27922791

2792+
bool NULLSrc1 = (opcode() == G4_math && src1_1->isNullReg());
27932793
if (dst0 && !inst->hasNULLDst()) {
2794-
if (std::any_of(src_begin(), src_end(), [&](G4_Operand *src) {
2795-
// TODO: check if we can remove the null src1 check for math as
2796-
// compareOperand should handle NullReg already.
2797-
if (opcode() == G4_math && src == getSrc(1) && src->isNullReg())
2798-
return false;
2799-
return src->compareOperand(dst0, getBuilder()) != Rel_disjoint;
2800-
}))
2801-
return true;
2802-
2803-
if ((pred1 && pred1->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
2794+
if ((src1_0 &&
2795+
src1_0->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
2796+
(src1_1 && !NULLSrc1 &&
2797+
src1_1->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
2798+
(src1_2 &&
2799+
src1_2->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
2800+
(src1_3 &&
2801+
src1_3->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
2802+
(pred1 && pred1->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
28042803
(implicitSrc1 &&
28052804
implicitSrc1->compareOperand(dst0, getBuilder()) != Rel_disjoint)) {
28062805
return true;
28072806
}
28082807
}
28092808

28102809
if (cMod0 && cMod0->getBase()) {
2811-
if (pred1 && pred1->compareOperand(cMod0, getBuilder()) != Rel_disjoint)
2812-
return true;
2813-
2814-
if (std::any_of(src_begin(), src_end(), [&](G4_Operand *src) {
2815-
return src->isFlag() &&
2816-
src->compareOperand(cMod0, getBuilder()) != Rel_disjoint;
2817-
}))
2810+
if ((pred1 && pred1->compareOperand(cMod0, getBuilder()) != Rel_disjoint) ||
2811+
(src1_0 && src1_0->isFlag() &&
2812+
src1_0->compareOperand(cMod0, getBuilder()) != Rel_disjoint) ||
2813+
(src1_2 && src1_2->isFlag() &&
2814+
src1_2->compareOperand(cMod0, getBuilder()) != Rel_disjoint) ||
2815+
(src1_1 && src1_1->isFlag() &&
2816+
src1_1->compareOperand(cMod0, getBuilder()) != Rel_disjoint)) {
28182817
return true;
2818+
}
28192819
}
28202820

28212821
if (implicitDst0) {
2822-
if (implicitSrc1 && implicitSrc1->compareOperand(
2823-
implicitDst0, getBuilder()) != Rel_disjoint)
2824-
return true;
2825-
2826-
if (std::any_of(src_begin(), src_end(), [&](G4_Operand *src) {
2827-
return src->isAccReg() &&
2828-
src->compareOperand(implicitDst0, getBuilder()) != Rel_disjoint;
2829-
}))
2822+
if ((implicitSrc1 && implicitSrc1->compareOperand(
2823+
implicitDst0, getBuilder()) != Rel_disjoint) ||
2824+
(src1_0 && src1_0->isAccReg() &&
2825+
src1_0->compareOperand(implicitDst0, getBuilder()) != Rel_disjoint) ||
2826+
(src1_2 && src1_2->isAccReg() &&
2827+
src1_2->compareOperand(implicitDst0, getBuilder()) != Rel_disjoint) ||
2828+
(src1_1 && src1_1->isAccReg() &&
2829+
src1_1->compareOperand(implicitDst0, getBuilder()) != Rel_disjoint)) {
28302830
return true;
2831+
}
28312832
}
28322833
return false;
28332834
}
@@ -7836,10 +7837,10 @@ G4_INST *G4_InstDpas::cloneInst(const IR_Builder *b) {
78367837
auto src1 = nonConstBuilder->duplicateOperand(getSrc(1));
78377838
auto src2 = nonConstBuilder->duplicateOperand(getSrc(2));
78387839
auto src3 = nonConstBuilder->duplicateOperand(getSrc(3));
7839-
auto src4 = nonConstBuilder->duplicateOperand(getSrc(4));
78407840
return nonConstBuilder->createInternalDpasInst(
7841-
op, getExecSize(), dst, src0, src1, src2, option, getSrc2Precision(),
7842-
getSrc1Precision(), getSystolicDepth(), getRepeatCount(), src3, src4);
7841+
op, getExecSize(), dst, src0, src1, src2, src3, option,
7842+
getSrc2Precision(), getSrc1Precision(), getSystolicDepth(),
7843+
getRepeatCount());
78437844
}
78447845

78457846
bool G4_InstDpas::isInt() const {
@@ -7893,9 +7894,9 @@ uint8_t G4_InstDpas::getOpsPerChan() const {
78937894
void G4_InstDpas::computeRightBound(G4_Operand *opnd) {
78947895
associateOpndWithInst(opnd, this);
78957896
if (opnd && !opnd->isImm() && !opnd->isNullReg()) {
7896-
uint8_t D = getSystolicDepth();
7897-
uint8_t C = getRepeatCount();
7898-
G4_ExecSize ES = getExecSize();
7897+
G4_InstDpas *dpasInst = asDpasInst();
7898+
uint8_t D = dpasInst->getSystolicDepth();
7899+
uint8_t C = dpasInst->getRepeatCount();
78997900

79007901
auto computeDpasOperandBound = [this](G4_Operand *opnd, unsigned leftBound,
79017902
unsigned rightBound) {
@@ -7907,24 +7908,24 @@ void G4_InstDpas::computeRightBound(G4_Operand *opnd) {
79077908
if (opnd == dst || (opnd == srcs[0] && !opnd->isNullReg())) {
79087909
// dst and src0 are always packed, and RB is exec_size * type_size *
79097910
// rep_count
7910-
auto opndSize = ES * opnd->getTypeSize() * C;
7911+
auto opndSize = dpasInst->getExecSize() * opnd->getTypeSize() * C;
79117912
computeDpasOperandBound(opnd, opnd->left_bound,
79127913
opnd->left_bound + opndSize - 1);
79137914
} else if (opnd == srcs[1]) {
7914-
uint32_t bytesPerLane = getSrc1SizePerLaneInByte();
7915+
uint32_t bytesPerLane = dpasInst->getSrc1SizePerLaneInByte();
79157916
uint8_t src1_D = D;
79167917

79177918
// Each lanes needs (src1_D * bytesPerLane) bytes, and it's multiple of
79187919
// DW!
79197920
uint32_t bytesPerLaneForAllDepth = bytesPerLane * src1_D;
79207921
bytesPerLaneForAllDepth = ((bytesPerLaneForAllDepth + 3) / 4) * 4;
79217922

7922-
uint32_t bytes = bytesPerLaneForAllDepth * ES;
7923+
uint32_t bytes = bytesPerLaneForAllDepth * dpasInst->getExecSize();
79237924
computeDpasOperandBound(opnd, opnd->left_bound,
79247925
opnd->left_bound + bytes - 1);
79257926
} else if (opnd == srcs[2]) {
79267927
// src2 is uniform.
7927-
uint32_t bytesPerLane = getSrc2SizePerLaneInByte();
7928+
uint32_t bytesPerLane = dpasInst->getSrc2SizePerLaneInByte();
79287929
uint32_t bytes = bytesPerLane * D * C;
79297930
if (op == G4_dpasw) {
79307931
bytes = bytesPerLane * D * ((C + 1) / 2);
@@ -7935,10 +7936,10 @@ void G4_InstDpas::computeRightBound(G4_Operand *opnd) {
79357936

79367937
else if (opnd && opnd == srcs[3]) {
79377938
uint32_t bytes;
7938-
if (isInt())
7939+
if (dpasInst->isInt())
79397940
{
79407941
bytes = 2 * getBuilder().getGRFSize();
7941-
} else if (isFP16() || isBF16()) {
7942+
} else if (dpasInst->isFP16() || dpasInst->isBF16()) {
79427943
bytes = getBuilder().getGRFSize();
79437944
} else { // isTF32()
79447945
bytes = getBuilder().getGRFSize() / 2;

visa/G4_IR.hpp

Lines changed: 4 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -126,13 +126,7 @@ class G4_INST {
126126

127127
protected:
128128
G4_opcode op;
129-
// Reserve 4 sources should be enough for most of instructions.
130-
// TODO: In fact, we would reserve not just 4 but also set the size of "srcs"
131-
// to 4. Currently there is some legacy code that presumes srcs[0:3] are
132-
// always accessible for updates, and refactoring the code appears to be
133-
// a challenge. We probably should still pursue the opportunity to remove that
134-
// presumption and make the code cleaner.
135-
llvm::SmallVector<G4_Operand *, /*N=*/4> srcs;
129+
llvm::SmallVector<G4_Operand *, G4_MAX_SRCS> srcs;
136130
G4_DstRegRegion *dst;
137131
G4_Predicate *predicate;
138132
G4_CondMod *mod;
@@ -292,11 +286,6 @@ class G4_INST {
292286
G4_Sat s, G4_ExecSize size, G4_DstRegRegion *d, G4_Operand *s0,
293287
G4_Operand *s1, G4_Operand *s2, G4_Operand *s3, G4_InstOpts opt);
294288

295-
G4_INST(const IR_Builder &irb, G4_Predicate *prd, G4_opcode o, G4_CondMod *m,
296-
G4_Sat s, G4_ExecSize size, G4_DstRegRegion *d, G4_Operand *s0,
297-
G4_Operand *s1, G4_Operand *s2, G4_Operand *s3, G4_Operand *s4,
298-
G4_InstOpts opt);
299-
300289
G4_INST(const IR_Builder &irb, G4_Predicate *prd, G4_opcode o, G4_CondMod *m,
301290
G4_Sat s, G4_ExecSize size, G4_DstRegRegion *d, G4_Operand *s0,
302291
G4_Operand *s1, G4_Operand *s2, G4_Operand *s3, G4_Operand *s4,
@@ -666,8 +655,6 @@ class G4_INST {
666655
return Opnd_src2;
667656
case 3:
668657
return Opnd_src3;
669-
case 4:
670-
return Opnd_src4;
671658
default:
672659
vISA_ASSERT_UNREACHABLE("bad source id");
673660
return Opnd_src0;
@@ -1034,10 +1021,10 @@ class G4_InstDpas : public G4_INST {
10341021

10351022
G4_InstDpas(const IR_Builder &builder, G4_opcode o, G4_ExecSize size,
10361023
G4_DstRegRegion *d, G4_Operand *s0, G4_Operand *s1,
1037-
G4_Operand *s2, G4_Operand *s3, G4_Operand *s4, G4_InstOpts opt,
1038-
GenPrecision a, GenPrecision w, uint8_t sd, uint8_t rc)
1024+
G4_Operand *s2, G4_Operand *s3, G4_InstOpts opt, GenPrecision a,
1025+
GenPrecision w, uint8_t sd, uint8_t rc)
10391026
: G4_INST(builder, nullptr, o, nullptr, g4::NOSAT, size, d, s0, s1, s2,
1040-
s3, s4, opt),
1027+
s3, opt),
10411028
Src2Precision(a), Src1Precision(w), SystolicDepth(sd), RepeatCount(rc) {
10421029
}
10431030

visa/G4_Opcode.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -12,8 +12,7 @@ SPDX-License-Identifier: MIT
1212
#include "common.h"
1313
#include "visa_igc_common_header.h"
1414

15-
// TODO: Probably should get rid of G4_MAX_SRCS constant at some point.
16-
#define G4_MAX_SRCS 5
15+
#define G4_MAX_SRCS 4
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#define G4_MAX_INTRINSIC_SRCS 8
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#define UNDEFINED_VAL 0xFFFFFFFF
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#define UNDEFINED_SHORT 0x8000

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