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Fixed typos in the fpga_mem properties that are emited #11968

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Merged
merged 1 commit into from
Nov 22, 2023
Merged

Fixed typos in the fpga_mem properties that are emited #11968

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2 changes: 1 addition & 1 deletion llvm/lib/SYCLLowerIR/CompileTimeProperties.def
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Original file line number Diff line number Diff line change
Expand Up @@ -42,7 +42,7 @@ SYCL_COMPILE_TIME_PROPERTY("sycl-latency-constraint", 6173,
SYCL_COMPILE_TIME_PROPERTY("sycl-datapath", 5825, DecorValueTy::none)
SYCL_COMPILE_TIME_PROPERTY("sycl-resource", 5826, DecorValueTy::string)
SYCL_COMPILE_TIME_PROPERTY("sycl-num-banks", 5827, DecorValueTy::uint32)
SYCL_COMPILE_TIME_PROPERTY("sycl-ram-stitching", 5836, DecorValueTy::boolean)
SYCL_COMPILE_TIME_PROPERTY("sycl-ram-stitching", 5836, DecorValueTy::uint32)
SYCL_COMPILE_TIME_PROPERTY("sycl-max-private-copies", 5829,
DecorValueTy::uint32)
SYCL_COMPILE_TIME_PROPERTY("sycl-num-replicates", 5832, DecorValueTy::uint32)
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8 changes: 4 additions & 4 deletions sycl/include/sycl/ext/intel/experimental/fpga_mem/properties.hpp
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Expand Up @@ -256,8 +256,8 @@ template <intel::experimental::resource_enum Value>
struct PropertyMetaInfo<intel::experimental::resource_key::value_t<Value>> {
static constexpr const char *name = "sycl-resource";
static constexpr const char *value =
((Value == intel::experimental::resource_enum::mlab) ? "mlab"
: "block_ram");
((Value == intel::experimental::resource_enum::mlab) ? "MLAB"
: "BLOCK_RAM");
};
template <size_t Value>
struct PropertyMetaInfo<intel::experimental::num_banks_key::value_t<Value>> {
Expand Down Expand Up @@ -296,8 +296,8 @@ struct PropertyMetaInfo<
static constexpr const char *name = "sycl-ram-stitching";
// enum to bool conversion to match with the SPIR-V decoration
// ForcePow2DepthINTEL
static constexpr bool value =
(Value == intel::experimental::ram_stitching_enum::max_fmax);
static constexpr size_t value = static_cast<size_t>(
Value == intel::experimental::ram_stitching_enum::max_fmax);
};
template <size_t Value>
struct PropertyMetaInfo<
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4 changes: 2 additions & 2 deletions sycl/test/check_device_code/fpga_mem_global.cpp
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Expand Up @@ -90,13 +90,13 @@ int main() {
// CHECK: ![[single_pumped_md]] = !{![[single_pumped:[0-9]*]], ![[mem_default]]}
// CHECK: ![[single_pumped]] = !{i32 5830}
// CHECK: ![[mlab_md]] = !{![[mlab:[0-9]*]]}
// CHECK: ![[mlab]] = !{i32 5826, !"mlab"}
// CHECK: ![[mlab]] = !{i32 5826, !"MLAB"}
// CHECK: ![[simple_dual_port_md]] = !{![[simple_dual_port:[0-9]*]], ![[mem_default]]}
// CHECK: ![[simple_dual_port]] = !{i32 5833}
// CHECK: ![[true_dual_port_md]] = !{![[true_dual_port:[0-9]*]], ![[mem_default]]}
// CHECK: ![[true_dual_port]] = !{i32 5885}
// CHECK: ![[block_ram_md]] = !{![[block_ram:[0-9]*]]}
// CHECK: ![[block_ram]] = !{i32 5826, !"block_ram"}
// CHECK: ![[block_ram]] = !{i32 5826, !"BLOCK_RAM"}
// CHECK: ![[banks_md]] = !{![[banks:[0-9]*]], ![[mem_default]]}
// CHECK: ![[banks]] = !{i32 5827, i32 4}
// CHECK: ![[stride_md]] = !{![[mem_default]], ![[stride:[0-9]*]]}
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8 changes: 4 additions & 4 deletions sycl/test/check_device_code/fpga_mem_local.cpp
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Expand Up @@ -10,14 +10,14 @@ namespace intel = sycl::ext::intel::experimental; // for fpga_mem
namespace oneapi = sycl::ext::oneapi::experimental; // for properties

// CHECK: [[MemoryINTEL:@.*]] = private unnamed_addr addrspace(1) constant [17 x i8] c"{5826:\22DEFAULT\22}\00"
// CHECK: [[ForcePow2DepthINTEL_FALSE:@.*]] = private unnamed_addr addrspace(1) constant [31 x i8] c"{5826:\22DEFAULT\22}{5836:\22false\22}\00"
// CHECK: [[ForcePow2DepthINTEL_TRUE:@.*]] = private unnamed_addr addrspace(1) constant [30 x i8] c"{5826:\22DEFAULT\22}{5836:\22true\22}\00"
// CHECK: [[ForcePow2DepthINTEL_FALSE:@.*]] = private unnamed_addr addrspace(1) constant [27 x i8] c"{5826:\22DEFAULT\22}{5836:\220\22}\00"
// CHECK: [[ForcePow2DepthINTEL_TRUE:@.*]] = private unnamed_addr addrspace(1) constant [27 x i8] c"{5826:\22DEFAULT\22}{5836:\221\22}\00"
// CHECK: [[DoublepumpINTEL:@.*]] = private unnamed_addr addrspace(1) constant [23 x i8] c"{5826:\22DEFAULT\22}{5831}\00"
// CHECK: [[SinglepumpINTEL:@.*]] = private unnamed_addr addrspace(1) constant [23 x i8] c"{5826:\22DEFAULT\22}{5830}\00"
// CHECK: [[MemoryINTEL_mlab:@.*]] = private unnamed_addr addrspace(1) constant [30 x i8] c"{5826:\22DEFAULT\22}{5826:\22mlab\22}\00"
// CHECK: [[MemoryINTEL_mlab:@.*]] = private unnamed_addr addrspace(1) constant [30 x i8] c"{5826:\22DEFAULT\22}{5826:\22MLAB\22}\00"
// CHECK: [[SimpleDualPortINTEL:@.*]] = private unnamed_addr addrspace(1) constant [23 x i8] c"{5826:\22DEFAULT\22}{5833}\00"
// CHECK: [[TrueDualPortINTEL:@.*]] = private unnamed_addr addrspace(1) constant [23 x i8] c"{5826:\22DEFAULT\22}{5885}\00"
// CHECK: [[MemoryINTEL_block_ram:@.*]] = private unnamed_addr addrspace(1) constant [35 x i8] c"{5826:\22DEFAULT\22}{5826:\22block_ram\22}\00"
// CHECK: [[MemoryINTEL_block_ram:@.*]] = private unnamed_addr addrspace(1) constant [35 x i8] c"{5826:\22DEFAULT\22}{5826:\22BLOCK_RAM\22}\00"
// CHECK: [[NumbanksINTEL:@.*]] = private unnamed_addr addrspace(1) constant [27 x i8] c"{5826:\22DEFAULT\22}{5827:\224\22}\00"
// CHECK: [[StridesizeINTEL:@.*]] = private unnamed_addr addrspace(1) constant [27 x i8] c"{5826:\22DEFAULT\22}{5883:\222\22}\00"
// CHECK: [[WordsizeINTEL:@.*]] = private unnamed_addr addrspace(1) constant [27 x i8] c"{5826:\22DEFAULT\22}{5884:\228\22}\00"
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