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[SYCL][ESIMD] Add unary and shift operators #3014

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Jan 13, 2021
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30 changes: 22 additions & 8 deletions sycl/include/CL/sycl/INTEL/esimd/esimd.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -234,15 +234,15 @@ template <typename Ty, int N> class simd {

#undef DEF_RELOP

#define DEF_LOGIC_OP(LOGIC_OP, OPASSIGN) \
ESIMD_INLINE friend simd operator LOGIC_OP(const simd &X, const simd &Y) { \
#define DEF_BITWISE_OP(BITWISE_OP, OPASSIGN) \
ESIMD_INLINE friend simd operator BITWISE_OP(const simd &X, const simd &Y) { \
static_assert(std::is_integral<Ty>(), "not integeral type"); \
auto V2 = X.data() LOGIC_OP Y.data(); \
auto V2 = X.data() BITWISE_OP Y.data(); \
return simd(V2); \
} \
ESIMD_INLINE friend simd &operator OPASSIGN(simd &LHS, const simd &RHS) { \
static_assert(std::is_integral<Ty>(), "not integeral type"); \
auto V2 = LHS.data() LOGIC_OP RHS.data(); \
auto V2 = LHS.data() BITWISE_OP RHS.data(); \
LHS.write(convert<vector_type>(V2)); \
return LHS; \
} \
Expand All @@ -251,11 +251,13 @@ template <typename Ty, int N> class simd {
return LHS; \
}

DEF_LOGIC_OP(&, &=)
DEF_LOGIC_OP(|, |=)
DEF_LOGIC_OP(^, ^=)
DEF_BITWISE_OP(&, &=)
DEF_BITWISE_OP(|, |=)
DEF_BITWISE_OP(^, ^=)
DEF_BITWISE_OP(<<, <<=)
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Looks good. I assume the underlying Clang vector operator will take care of integer promotion as expected.

Looks like the support for % and %= are still missing - could be added to the end of DEF_BINOP list @line 210.

DEF_BITWISE_OP(>>, >>=)

#undef DEF_LOGIC_OP
#undef DEF_BITWISE_OP

// Operator ++, --
simd &operator++() {
Expand All @@ -277,6 +279,18 @@ template <typename Ty, int N> class simd {
return Ret;
}

#define DEF_UNARY_OP(UNARY_OP) \
simd operator UNARY_OP() { \
auto V = UNARY_OP(data()); \
return simd(V); \
}
DEF_UNARY_OP(!)
DEF_UNARY_OP(~)
DEF_UNARY_OP(+)
DEF_UNARY_OP(-)

#undef DEF_UNARY_OP

/// \name Replicate
/// Replicate simd instance given a region.
/// @{
Expand Down
44 changes: 29 additions & 15 deletions sycl/include/CL/sycl/INTEL/esimd/esimd_view.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -247,38 +247,52 @@ template <typename BaseTy, typename RegionTy> class simd_view {

#undef DEF_RELOP

#define DEF_LOGIC_OP(LOGIC_OP, OPASSIGN) \
ESIMD_INLINE friend auto operator LOGIC_OP(const simd_view &X, \
const value_type &Y) { \
#define DEF_BITWISE_OP(BITWISE_OP, OPASSIGN) \
ESIMD_INLINE friend auto operator BITWISE_OP(const simd_view &X, \
const value_type &Y) { \
static_assert(std::is_integral<element_type>(), "not integral type"); \
auto V2 = X.read().data() LOGIC_OP Y.data(); \
auto V2 = X.read().data() BITWISE_OP Y.data(); \
return simd<element_type, length>(V2); \
} \
ESIMD_INLINE friend auto operator LOGIC_OP(const value_type &X, \
const simd_view &Y) { \
ESIMD_INLINE friend auto operator BITWISE_OP(const value_type &X, \
const simd_view &Y) { \
static_assert(std::is_integral<element_type>(), "not integral type"); \
auto V2 = X.data() LOGIC_OP Y.read().data(); \
auto V2 = X.data() BITWISE_OP Y.read().data(); \
return simd<element_type, length>(V2); \
} \
ESIMD_INLINE friend auto operator LOGIC_OP(const simd_view &X, \
const simd_view &Y) { \
return (X LOGIC_OP Y.read()); \
ESIMD_INLINE friend auto operator BITWISE_OP(const simd_view &X, \
const simd_view &Y) { \
return (X BITWISE_OP Y.read()); \
} \
simd_view &operator OPASSIGN(const value_type &RHS) { \
static_assert(std::is_integral<element_type>(), "not integeral type"); \
auto V2 = read().data() LOGIC_OP RHS.data(); \
auto V2 = read().data() BITWISE_OP RHS.data(); \
auto V3 = convert<vector_type>(V2); \
write(V3); \
return *this; \
} \
simd_view &operator OPASSIGN(const simd_view &RHS) { \
return (*this OPASSIGN RHS.read()); \
}
DEF_LOGIC_OP(&, &=)
DEF_LOGIC_OP(|, |=)
DEF_LOGIC_OP(^, ^=)
DEF_BITWISE_OP(&, &=)
DEF_BITWISE_OP(|, |=)
DEF_BITWISE_OP(^, ^=)
DEF_BITWISE_OP(>>, >>=)
DEF_BITWISE_OP(<<, <<=)

#undef DEF_BITWISE_OP

#define DEF_UNARY_OP(UNARY_OP) \
auto operator UNARY_OP() { \
auto V = UNARY_OP(read().data()); \
return simd<element_type, length>(V); \
}
DEF_UNARY_OP(!)
DEF_UNARY_OP(~)
DEF_UNARY_OP(+)
DEF_UNARY_OP(-)

#undef DEF_LOGIC_OP
#undef DEF_UNARY_OP

// Operator ++, --
simd_view &operator++() {
Expand Down
10 changes: 10 additions & 0 deletions sycl/test/esimd/simd.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -73,6 +73,16 @@ bool test_simd_bin_ops() __attribute__((sycl_device)) {
return v0[0] == 1;
}

bool test_simd_unary_ops() __attribute__((sycl_device)) {
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These tests are compile-only. Please create executable test as well in llvm-test-suite. Otherwise looks good to me.

simd<int, 8> v0 = 1;
simd<int, 8> v1 = 2;
v0 <<= v1;
v1 = -v0;
v0 = ~v1;
v1 = !v0;
return v1[0] == 1;
}

bool test_nested_1d_select() __attribute__((sycl_device)) {
simd<int, 8> r0(0, 1);

Expand Down
12 changes: 12 additions & 0 deletions sycl/test/esimd/simd_view.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -35,6 +35,18 @@ bool test_simd_view_bin_ops() __attribute__((sycl_device)) {
return v0[0] == 1;
}

bool test_simd_view_unary_ops() __attribute__((sycl_device)) {
simd<int, 16> v0 = 1;
simd<int, 16> v1 = 2;
auto ref0 = v0.select<8, 2>(0);
auto ref1 = v1.select<8, 2>(0);
ref0 <<= ref1;
ref1 = -ref0;
ref0 = ~ref1;
ref1 = !ref0;
return v1[0] == 1;
}

bool test_simd_view_assign1() __attribute__((sycl_device)) {
simd<int, 32> v0(0, 1);
simd<int, 16> v1(0, 1);
Expand Down