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[SYCL] submit barrier command to execution (see issue #3000) #3045

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Merged
merged 1 commit into from
Jan 27, 2021

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@smaslov-intel smaslov-intel commented Jan 16, 2021

Fixes #3000
A submission of the barrier was missing.
Test: intel/llvm-test-suite#98

Signed-off-by: Sergey V Maslov [email protected]

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bso-intel previously approved these changes Jan 21, 2021
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LGTM.

smaslov-intel added a commit to smaslov-intel/llvm-test-suite that referenced this pull request Jan 21, 2021
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bso-intel previously approved these changes Jan 22, 2021
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LGTM

@smaslov-intel smaslov-intel changed the title [SYCL] submit barrier command to execution (see issue #3000) [DO NOT MERGE][SYCL] submit barrier command to execution (see issue #3000) Jan 22, 2021
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TODO: Wait for #3081 to merge and re-base.

@smaslov-intel smaslov-intel changed the title [DO NOT MERGE][SYCL] submit barrier command to execution (see issue #3000) [SYCL] submit barrier command to execution (see issue #3000) Jan 25, 2021
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LGTM

@romanovvlad romanovvlad merged commit 7c31f90 into intel:sycl Jan 27, 2021
acmnpv pushed a commit to gromacs/gromacs that referenced this pull request Feb 18, 2021
Associated changes:

- Added function stubs to PME: necessary for compilation.
- Stricter SYCL hardware compatibility checks: limits on subgroup size
  and the availability of local memory.
- The kernel implementation and overall logic closely follow the OpenCL
  implementation. Divergences are documented locally.

Limitations:

- No fine-grained timings yet.
- Code-duplication with CUDA and OpenCL: see #2608.
- Minor differences in local/nonlocal synchronization: see #3895,
  related to #2608.
- Only the OpenCL backend was extensively tested. LevelZero works fine
  without MPI but stalls due to a known bug. The fix for DPCPP runtime
  is available, but not yet part of any OneAPI release:
  intel/llvm#3045.
- The complex/position-restraints regression test fails: see #3846.
- No performance tuning: see #3847.

Performance on rnase-cubic system is similar to OpenCL implementation.
baixiaokuang pushed a commit to deepmodeling/GROMACS that referenced this pull request Apr 8, 2021
Associated changes:

- Added function stubs to PME: necessary for compilation.
- Stricter SYCL hardware compatibility checks: limits on subgroup size
  and the availability of local memory.
- The kernel implementation and overall logic closely follow the OpenCL
  implementation. Divergences are documented locally.

Limitations:

- No fine-grained timings yet.
- Code-duplication with CUDA and OpenCL: see #2608.
- Minor differences in local/nonlocal synchronization: see #3895,
  related to #2608.
- Only the OpenCL backend was extensively tested. LevelZero works fine
  without MPI but stalls due to a known bug. The fix for DPCPP runtime
  is available, but not yet part of any OneAPI release:
  intel/llvm#3045.
- The complex/position-restraints regression test fails: see #3846.
- No performance tuning: see #3847.

Performance on rnase-cubic system is similar to OpenCL implementation.
iclsrc pushed a commit that referenced this pull request Mar 28, 2025
llvm-spirv.cpp was relying on transitive includes for these.

Also remove an unneeded `<set>` include.

Original commit:
KhronosGroup/SPIRV-LLVM-Translator@cedb8ae2e22102e
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[SYCL][SYCL_INTEL_enqueue_barrier] submit_barrier and LevelZero backend.
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