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[SYCL][FPGA] Refactor of [[intel::bankwidth()]] and [[intel::numbanks()]] attributes #4513

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Merged
merged 4 commits into from
Sep 8, 2021
Merged

[SYCL][FPGA] Refactor of [[intel::bankwidth()]] and [[intel::numbanks()]] attributes #4513

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59f03e4
[SYCL][FPGA] Refactor of [[intel::bankwidth()]] and [[intel::numbanks…
smanna12 Sep 8, 2021
8f93e17
Fix Clang format errors
smanna12 Sep 8, 2021
209978d
Merge remote-tracking branch 'my_remote/sycl' into RefactorAttrs
smanna12 Sep 8, 2021
6080f1a
add ast for implicit numbank attr
smanna12 Sep 8, 2021
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5 changes: 3 additions & 2 deletions clang/include/clang/Basic/Attr.td
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Original file line number Diff line number Diff line change
Expand Up @@ -2170,7 +2170,7 @@ def : MutualExclusions<[IntelFPGADoublePump, IntelFPGASinglePump,
IntelFPGARegister]>;

// One integral argument.
def IntelFPGABankWidth : Attr {
def IntelFPGABankWidth : InheritableAttr {
let Spellings = [CXX11<"intelfpga","bankwidth">,
CXX11<"intel","bankwidth">];
let Args = [ExprArgument<"Value">];
Expand All @@ -2181,7 +2181,7 @@ def IntelFPGABankWidth : Attr {
}
def : MutualExclusions<[IntelFPGARegister, IntelFPGABankWidth]>;

def IntelFPGANumBanks : Attr {
def IntelFPGANumBanks : InheritableAttr {
let Spellings = [CXX11<"intelfpga","numbanks">,
CXX11<"intel","numbanks">];
let Args = [ExprArgument<"Value">];
Expand Down Expand Up @@ -2260,6 +2260,7 @@ def IntelFPGABankBits : Attr {
let Documentation = [IntelFPGABankBitsDocs];
}
def : MutualExclusions<[IntelFPGARegister, IntelFPGABankBits]>;
def : MutualExclusions<[IntelFPGARegister, IntelFPGANumBanks]>;

def IntelFPGAForcePow2Depth : InheritableAttr {
let Spellings = [CXX11<"intelfpga","force_pow2_depth">,
Expand Down
58 changes: 8 additions & 50 deletions clang/include/clang/Sema/Sema.h
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Expand Up @@ -10406,9 +10406,6 @@ class Sema final {
/// attribute to be added (usually because of a pragma).
void AddOptnoneAttributeIfNoConflicts(FunctionDecl *FD, SourceLocation Loc);

template <typename AttrType>
void AddOneConstantPowerTwoValueAttr(Decl *D, const AttributeCommonInfo &CI,
Expr *E);
void AddIntelFPGABankBitsAttr(Decl *D, const AttributeCommonInfo &CI,
Expr **Exprs, unsigned Size);
template <typename AttrType>
Expand Down Expand Up @@ -10472,6 +10469,14 @@ class Sema final {
SYCLIntelMaxGlobalWorkDimAttr *
MergeSYCLIntelMaxGlobalWorkDimAttr(Decl *D,
const SYCLIntelMaxGlobalWorkDimAttr &A);
void AddIntelFPGABankWidthAttr(Decl *D, const AttributeCommonInfo &CI,
Expr *E);
IntelFPGABankWidthAttr *
MergeIntelFPGABankWidthAttr(Decl *D, const IntelFPGABankWidthAttr &A);
void AddIntelFPGANumBanksAttr(Decl *D, const AttributeCommonInfo &CI,
Expr *E);
IntelFPGANumBanksAttr *
MergeIntelFPGANumBanksAttr(Decl *D, const IntelFPGANumBanksAttr &A);
/// AddAlignedAttr - Adds an aligned attribute to a particular declaration.
void AddAlignedAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E,
bool IsPackExpansion);
Expand Down Expand Up @@ -13536,53 +13541,6 @@ void Sema::addIntelTripleArgAttr(Decl *D, const AttributeCommonInfo &CI,
WorkGroupAttrType(Context, CI, XDimExpr, YDimExpr, ZDimExpr));
}

template <typename AttrType>
void Sema::AddOneConstantPowerTwoValueAttr(Decl *D,
const AttributeCommonInfo &CI,
Expr *E) {
AttrType TmpAttr(Context, CI, E);

if (!E->isValueDependent()) {
llvm::APSInt Value;
ExprResult ICE = VerifyIntegerConstantExpression(E, &Value);
if (ICE.isInvalid())
return;
if (!Value.isStrictlyPositive()) {
Diag(E->getExprLoc(), diag::err_attribute_requires_positive_integer)
<< CI << /*positive*/ 0;
return;
}
if (!Value.isPowerOf2()) {
Diag(CI.getLoc(), diag::err_attribute_argument_not_power_of_two)
<< &TmpAttr;
return;
}
if (IntelFPGANumBanksAttr::classof(&TmpAttr)) {
if (auto *BBA = D->getAttr<IntelFPGABankBitsAttr>()) {
unsigned NumBankBits = BBA->args_size();
if (NumBankBits != Value.ceilLogBase2()) {
Diag(TmpAttr.getLocation(), diag::err_bankbits_numbanks_conflicting);
return;
}
}
}
E = ICE.get();
}

if (!D->hasAttr<IntelFPGAMemoryAttr>())
D->addAttr(IntelFPGAMemoryAttr::CreateImplicit(
Context, IntelFPGAMemoryAttr::Default));

// We are adding a user NumBanks, drop any implicit default.
if (IntelFPGANumBanksAttr::classof(&TmpAttr)) {
if (auto *NBA = D->getAttr<IntelFPGANumBanksAttr>())
if (NBA->isImplicit())
D->dropAttr<IntelFPGANumBanksAttr>();
}

D->addAttr(::new (Context) AttrType(Context, CI, E));
}

/// RAII object that enters a new expression evaluation context.
class EnterExpressionEvaluationContext {
Sema &Actions;
Expand Down
4 changes: 4 additions & 0 deletions clang/lib/Sema/SemaDecl.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2704,6 +2704,10 @@ static bool mergeDeclAttribute(Sema &S, NamedDecl *D,
NewAttr = S.MergeSYCLIntelMaxGlobalWorkDimAttr(D, *A);
else if (const auto *BTFA = dyn_cast<BTFTagAttr>(Attr))
NewAttr = S.mergeBTFTagAttr(D, *BTFA);
else if (const auto *A = dyn_cast<IntelFPGABankWidthAttr>(Attr))
NewAttr = S.MergeIntelFPGABankWidthAttr(D, *A);
else if (const auto *A = dyn_cast<IntelFPGANumBanksAttr>(Attr))
NewAttr = S.MergeIntelFPGANumBanksAttr(D, *A);
else if (Attr->shouldInheritEvenIfAlreadyPresent() || !DeclHasAttr(D, Attr))
NewAttr = cast<InheritableAttr>(Attr->clone(S.Context));

Expand Down
181 changes: 167 additions & 14 deletions clang/lib/Sema/SemaDeclAttr.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -6389,10 +6389,6 @@ static bool checkIntelFPGARegisterAttrCompatibility(Sema &S, Decl *D,
if (!MA->isImplicit() &&
checkAttrMutualExclusion<IntelFPGAMemoryAttr>(S, D, Attr))
InCompat = true;
if (auto *NBA = D->getAttr<IntelFPGANumBanksAttr>())
if (!NBA->isImplicit() &&
checkAttrMutualExclusion<IntelFPGANumBanksAttr>(S, D, Attr))
InCompat = true;

return InCompat;
}
Expand All @@ -6409,21 +6405,178 @@ static void handleIntelFPGARegisterAttr(Sema &S, Decl *D, const ParsedAttr &A) {
handleSimpleAttribute<IntelFPGARegisterAttr>(S, D, A);
}

/// Handle the [[intelfpga::bankwidth]] and [[intelfpga::numbanks]] attributes.
/// Handle the [[intel::bankwidth]] and [[intel::numbanks]] attributes.
/// These require a single constant power of two greater than zero.
/// These are incompatible with the register attribute.
/// The numbanks and bank_bits attributes are related. If bank_bits exists
/// when handling numbanks they are checked for consistency.
template <typename AttrType>
static void handleOneConstantPowerTwoValueAttr(Sema &S, Decl *D,
const ParsedAttr &A) {
checkForDuplicateAttribute<AttrType>(S, D, A);
if (checkAttrMutualExclusion<IntelFPGARegisterAttr>(S, D, A))
return;

void Sema::AddIntelFPGABankWidthAttr(Decl *D, const AttributeCommonInfo &CI,
Expr *E) {
if (!E->isValueDependent()) {
// Validate that we have an integer constant expression and then store the
// converted constant expression into the semantic attribute so that we
// don't have to evaluate it again later.
llvm::APSInt ArgVal;
ExprResult Res = VerifyIntegerConstantExpression(E, &ArgVal);
if (Res.isInvalid())
return;
E = Res.get();

// This attribute requires a strictly positive value.
if (ArgVal <= 0) {
Diag(E->getExprLoc(), diag::err_attribute_requires_positive_integer)
<< CI << /*positive*/ 0;
return;
}

// This attribute requires a single constant power of two greater than zero.
if (!ArgVal.isPowerOf2()) {
Diag(E->getExprLoc(), diag::err_attribute_argument_not_power_of_two)
<< CI;
return;
}

// Check to see if there's a duplicate attribute with different values
// already applied to the declaration.
if (const auto *DeclAttr = D->getAttr<IntelFPGABankWidthAttr>()) {
// If the other attribute argument is instantiation dependent, we won't
// have converted it to a constant expression yet and thus we test
// whether this is a null pointer.
if (const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
if (ArgVal != DeclExpr->getResultAsAPSInt()) {
Diag(CI.getLoc(), diag::warn_duplicate_attribute) << CI;
Diag(DeclAttr->getLoc(), diag::note_previous_attribute);
}
// Drop the duplicate attribute.
return;
}
}
}

// If the declaration does not have an [[intel::fpga_memory]]
// attribute, this creates one as an implicit attribute.
if (!D->hasAttr<IntelFPGAMemoryAttr>())
D->addAttr(IntelFPGAMemoryAttr::CreateImplicit(
Context, IntelFPGAMemoryAttr::Default));

D->addAttr(::new (Context) IntelFPGABankWidthAttr(Context, CI, E));
}

IntelFPGABankWidthAttr *
Sema::MergeIntelFPGABankWidthAttr(Decl *D, const IntelFPGABankWidthAttr &A) {
// Check to see if there's a duplicate attribute with different values
// already applied to the declaration.
if (const auto *DeclAttr = D->getAttr<IntelFPGABankWidthAttr>()) {
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue());
const auto *MergeExpr = dyn_cast<ConstantExpr>(A.getValue());
if (DeclExpr && MergeExpr &&
DeclExpr->getResultAsAPSInt() != MergeExpr->getResultAsAPSInt()) {
Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
Diag(A.getLoc(), diag::note_previous_attribute);
return nullptr;
}
}

return ::new (Context) IntelFPGABankWidthAttr(Context, A, A.getValue());
}

static void handleIntelFPGABankWidthAttr(Sema &S, Decl *D,
const ParsedAttr &A) {
S.CheckDeprecatedSYCLAttributeSpelling(A);

S.AddIntelFPGABankWidthAttr(D, A, A.getArgAsExpr(0));
}

void Sema::AddIntelFPGANumBanksAttr(Decl *D, const AttributeCommonInfo &CI,
Expr *E) {
if (!E->isValueDependent()) {
// Validate that we have an integer constant expression and then store the
// converted constant expression into the semantic attribute so that we
// don't have to evaluate it again later.
llvm::APSInt ArgVal;
ExprResult Res = VerifyIntegerConstantExpression(E, &ArgVal);
if (Res.isInvalid())
return;
E = Res.get();

// This attribute requires a strictly positive value.
if (ArgVal <= 0) {
Diag(E->getExprLoc(), diag::err_attribute_requires_positive_integer)
<< CI << /*positive*/ 0;
return;
}

// This attribute requires a single constant power of two greater than zero.
if (!ArgVal.isPowerOf2()) {
Diag(E->getExprLoc(), diag::err_attribute_argument_not_power_of_two)
<< CI;
return;
}

// Check or add the related BankBits attribute.
if (auto *BBA = D->getAttr<IntelFPGABankBitsAttr>()) {
unsigned NumBankBits = BBA->args_size();
if (NumBankBits != ArgVal.ceilLogBase2()) {
Diag(E->getExprLoc(), diag::err_bankbits_numbanks_conflicting) << CI;
return;
}
}

// Check to see if there's a duplicate attribute with different values
// already applied to the declaration.
if (const auto *DeclAttr = D->getAttr<IntelFPGANumBanksAttr>()) {
// If the other attribute argument is instantiation dependent, we won't
// have converted it to a constant expression yet and thus we test
// whether this is a null pointer.
if (const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue())) {
if (ArgVal != DeclExpr->getResultAsAPSInt()) {
Diag(CI.getLoc(), diag::warn_duplicate_attribute) << CI;
Diag(DeclAttr->getLoc(), diag::note_previous_attribute);
}
// Drop the duplicate attribute.
return;
}
}
}

// If the declaration does not have an [[intel::fpga_memory]]
// attribute, this creates one as an implicit attribute.
if (!D->hasAttr<IntelFPGAMemoryAttr>())
D->addAttr(IntelFPGAMemoryAttr::CreateImplicit(
Context, IntelFPGAMemoryAttr::Default));

// We are adding a user NumBanks attribute, drop any implicit default.
if (auto *NBA = D->getAttr<IntelFPGANumBanksAttr>()) {
if (NBA->isImplicit())
D->dropAttr<IntelFPGANumBanksAttr>();
}

D->addAttr(::new (Context) IntelFPGANumBanksAttr(Context, CI, E));
}

IntelFPGANumBanksAttr *
Sema::MergeIntelFPGANumBanksAttr(Decl *D, const IntelFPGANumBanksAttr &A) {
// Check to see if there's a duplicate attribute with different values
// already applied to the declaration.
if (const auto *DeclAttr = D->getAttr<IntelFPGANumBanksAttr>()) {
const auto *DeclExpr = dyn_cast<ConstantExpr>(DeclAttr->getValue());
const auto *MergeExpr = dyn_cast<ConstantExpr>(A.getValue());
if (DeclExpr && MergeExpr &&
DeclExpr->getResultAsAPSInt() != MergeExpr->getResultAsAPSInt()) {
Diag(DeclAttr->getLoc(), diag::warn_duplicate_attribute) << &A;
Diag(A.getLoc(), diag::note_previous_attribute);
return nullptr;
}
}

return ::new (Context) IntelFPGANumBanksAttr(Context, A, A.getValue());
}

static void handleIntelFPGANumBanksAttr(Sema &S, Decl *D, const ParsedAttr &A) {
S.CheckDeprecatedSYCLAttributeSpelling(A);

S.AddOneConstantPowerTwoValueAttr<AttrType>(D, A, A.getArgAsExpr(0));
S.AddIntelFPGANumBanksAttr(D, A, A.getArgAsExpr(0));
}

static void handleIntelFPGASimpleDualPortAttr(Sema &S, Decl *D,
Expand Down Expand Up @@ -10124,10 +10277,10 @@ static void ProcessDeclAttribute(Sema &S, Scope *scope, Decl *D,
handleIntelFPGARegisterAttr(S, D, AL);
break;
case ParsedAttr::AT_IntelFPGABankWidth:
handleOneConstantPowerTwoValueAttr<IntelFPGABankWidthAttr>(S, D, AL);
handleIntelFPGABankWidthAttr(S, D, AL);
break;
case ParsedAttr::AT_IntelFPGANumBanks:
handleOneConstantPowerTwoValueAttr<IntelFPGANumBanksAttr>(S, D, AL);
handleIntelFPGANumBanksAttr(S, D, AL);
break;
case ParsedAttr::AT_IntelFPGAPrivateCopies:
handleIntelFPGAPrivateCopiesAttr(S, D, AL);
Expand Down
6 changes: 2 additions & 4 deletions clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -593,8 +593,7 @@ static void instantiateIntelFPGABankWidthAttr(
S, Sema::ExpressionEvaluationContext::ConstantEvaluated);
ExprResult Result = S.SubstExpr(Attr->getValue(), TemplateArgs);
if (!Result.isInvalid())
S.AddOneConstantPowerTwoValueAttr<IntelFPGABankWidthAttr>(
New, *Attr, Result.getAs<Expr>());
S.AddIntelFPGABankWidthAttr(New, *Attr, Result.getAs<Expr>());
}

static void instantiateIntelFPGANumBanksAttr(
Expand All @@ -604,8 +603,7 @@ static void instantiateIntelFPGANumBanksAttr(
S, Sema::ExpressionEvaluationContext::ConstantEvaluated);
ExprResult Result = S.SubstExpr(Attr->getValue(), TemplateArgs);
if (!Result.isInvalid())
S.AddOneConstantPowerTwoValueAttr<IntelFPGANumBanksAttr>(
New, *Attr, Result.getAs<Expr>());
S.AddIntelFPGANumBanksAttr(New, *Attr, Result.getAs<Expr>());
}

static void instantiateIntelFPGABankBitsAttr(
Expand Down
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