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[SYCL][FPGA] Silence unknown attribut warnings on Host compilation #5619

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Merged
merged 2 commits into from
Feb 25, 2022
Merged

[SYCL][FPGA] Silence unknown attribut warnings on Host compilation #5619

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581bf1f
[SYCL] Silence unknown attribut warnings on Host compilation
smanna12 Feb 20, 2022
a8c136b
update test
smanna12 Feb 20, 2022
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14 changes: 7 additions & 7 deletions clang/include/clang/Basic/Attr.td
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Original file line number Diff line number Diff line change
Expand Up @@ -1370,7 +1370,7 @@ def SYCLRequiresDecomposition : InheritableAttr {
def SYCLIntelKernelArgsRestrict : InheritableAttr {
let Spellings = [CXX11<"intel", "kernel_args_restrict">];
let Subjects = SubjectList<[Function], ErrorDiag>;
let LangOpts = [SYCLIsDevice, SYCLIsHost];
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
let Documentation = [SYCLIntelKernelArgsRestrictDocs];
let SimpleHandler = 1;
let SupportsNonconformingLambdaSyntax = 1;
Expand All @@ -1379,15 +1379,15 @@ def SYCLIntelKernelArgsRestrict : InheritableAttr {
def SYCLIntelNumSimdWorkItems : InheritableAttr {
let Spellings = [CXX11<"intel", "num_simd_work_items">];
let Args = [ExprArgument<"Value">];
let LangOpts = [SYCLIsDevice, SYCLIsHost];
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
let Subjects = SubjectList<[Function], ErrorDiag>;
let Documentation = [SYCLIntelNumSimdWorkItemsAttrDocs];
let SupportsNonconformingLambdaSyntax = 1;
}

def SYCLIntelUseStallEnableClusters : InheritableAttr {
let Spellings = [CXX11<"intel","use_stall_enable_clusters">];
let LangOpts = [SYCLIsHost, SYCLIsDevice];
let LangOpts = [SilentlyIgnoreSYCLIsHost, SYCLIsDevice];
let Subjects = SubjectList<[Function], ErrorDiag>;
let Documentation = [SYCLIntelUseStallEnableClustersAttrDocs];
let SupportsNonconformingLambdaSyntax = 1;
Expand All @@ -1396,7 +1396,7 @@ def SYCLIntelUseStallEnableClusters : InheritableAttr {
def SYCLIntelSchedulerTargetFmaxMhz : InheritableAttr {
let Spellings = [CXX11<"intel", "scheduler_target_fmax_mhz">];
let Args = [ExprArgument<"Value">];
let LangOpts = [SYCLIsDevice, SYCLIsHost];
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
let Subjects = SubjectList<[Function], ErrorDiag>;
let Documentation = [SYCLIntelSchedulerTargetFmaxMhzAttrDocs];
let SupportsNonconformingLambdaSyntax = 1;
Expand All @@ -1407,7 +1407,7 @@ def SYCLIntelMaxWorkGroupSize : InheritableAttr {
let Args = [ExprArgument<"XDim">,
ExprArgument<"YDim">,
ExprArgument<"ZDim">];
let LangOpts = [SYCLIsDevice, SYCLIsHost];
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
let Subjects = SubjectList<[Function], ErrorDiag>;
let AdditionalMembers = [{
Optional<llvm::APSInt> getXDimVal() const {
Expand All @@ -1433,7 +1433,7 @@ def SYCLIntelMaxWorkGroupSize : InheritableAttr {
def SYCLIntelMaxGlobalWorkDim : InheritableAttr {
let Spellings = [CXX11<"intel", "max_global_work_dim">];
let Args = [ExprArgument<"Value">];
let LangOpts = [SYCLIsDevice, SYCLIsHost];
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
let Subjects = SubjectList<[Function], ErrorDiag>;
let Documentation = [SYCLIntelMaxGlobalWorkDimAttrDocs];
let SupportsNonconformingLambdaSyntax = 1;
Expand Down Expand Up @@ -2269,7 +2269,7 @@ def IntelFPGABankBits : Attr {
let Args = [VariadicExprArgument<"Args">];
let Subjects = SubjectList<[IntelFPGAConstVar, IntelFPGALocalStaticAgentMemVar,
Field], ErrorDiag>;
let LangOpts = [SYCLIsDevice, SYCLIsHost];
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
let Documentation = [IntelFPGABankBitsDocs];
}
def : MutualExclusions<[IntelFPGARegister, IntelFPGABankBits]>;
Expand Down
39 changes: 38 additions & 1 deletion clang/test/SemaSYCL/spurious-host-warning.cpp
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@@ -1,6 +1,9 @@
// RUN: %clang_cc1 -fsycl-is-host -triple x86_64-pc-linux-gnu -fsyntax-only -verify %s -DSYCLHOST
// RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -fsyntax-only -verify %s

// Test checks the attribute is silently ignored during host compilation
// where -fsycl-is-host is passed on cc1.

#ifdef SYCLHOST
// expected-no-diagnostics
#endif
Expand Down Expand Up @@ -56,5 +59,39 @@ void foo()
// expected-warning@+2 {{'simple_dual_port' attribute ignored}}
#endif
[[intel::simple_dual_port]] unsigned int v_ten[64];
}

#ifndef SYCLHOST
// expected-warning@+2 {{'bank_bits' attribute ignored}}
#endif
[[intel::bank_bits(2, 3, 4, 5)]] unsigned int v_eleven[64];

#ifndef SYCLHOST
// expected-warning@+2 {{'use_stall_enable_clusters' attribute ignored}}
#endif
[[intel::use_stall_enable_clusters]] void func();

#ifndef SYCLHOST
// expected-warning@+2 {{'max_global_work_dim' attribute ignored}}
#endif
[[intel::max_global_work_dim(1)]] void func1();

#ifndef SYCLHOST
// expected-warning@+2 {{'scheduler_target_fmax_mhz' attribute ignored}}
#endif
[[intel::scheduler_target_fmax_mhz(3)]] void func2();

#ifndef SYCLHOST
// expected-warning@+2 {{'kernel_args_restrict' attribute ignored}}
#endif
[[intel::kernel_args_restrict]] void func3();

#ifndef SYCLHOST
// expected-warning@+2 {{'num_simd_work_items' attribute ignored}}
#endif
[[intel::num_simd_work_items(12)]] void func4();

#ifndef SYCLHOST
// expected-warning@+2 {{'max_work_group_size' attribute ignored}}
#endif
[[intel::max_work_group_size(32, 32, 32)]] void func5();
}