[SYCL][ESIMD] Fix an issue with intrinsic generation #7026
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Complementary test PR: intel/llvm-test-suite#1319 |
kbobrovs
reviewed
Oct 12, 2022
| @@ -328,14 +328,14 @@ class ESIMDIntrinDescTable { | |||
| {"rdregion", | |||
| {"rdregion", {a(0), t(3), t(4), t(5), a(1), t(6)}, nk(-1)}}, | |||
| {"rdindirect", | |||
| {"rdregion", {a(0), c32(0), t(2), c32(0), a(1), t(3)}, nk(-1)}}, | |||
| {"rdregion", {a(0), c32(0), c32(1), c32(0), a(1), t(3)}, nk(-1)}}, | |||
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what this argument means
### * arg3: i32 stride in elements, constant
? It is strange it is forced to constant 1
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oh, it is
### * arg2: i32 width in elements, constant
why it is forced to 1?
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I talked to @vmustya, 1 for indirect version means "number of elements per offset", so it seems correct.
kbobrovs
approved these changes
Oct 12, 2022
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