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[SYCL] Remove intel_gpu_ehl target #8521

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Merged
merged 3 commits into from
Mar 7, 2023
Merged

[SYCL] Remove intel_gpu_ehl target #8521

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1374131
[SYCL] Remove intel_gpu_ehl target
steffenlarsen Mar 2, 2023
0b53cf7
Remove missed cases
steffenlarsen Mar 2, 2023
0b178fc
Remove missed toolchain case
steffenlarsen Mar 2, 2023
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2 changes: 0 additions & 2 deletions clang/lib/Driver/ToolChains/SYCL.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -646,7 +646,6 @@ StringRef SYCL::gen::resolveGenDevice(StringRef DeviceName) {
.Cases("intel_gpu_aml", "intel_gpu_9_6_0", "aml")
.Cases("intel_gpu_cml", "intel_gpu_9_7_0", "cml")
.Cases("intel_gpu_icllp", "intel_gpu_11_0_0", "icllp")
.Cases("intel_gpu_ehl", "intel_gpu_11_2_0", "ehl")
.Cases("intel_gpu_tgllp", "intel_gpu_12_0_0", "tgllp")
.Case("intel_gpu_rkl", "rkl")
.Case("intel_gpu_adl_s", "adl_s")
Expand Down Expand Up @@ -711,7 +710,6 @@ SmallString<64> SYCL::gen::getGenDeviceMacro(StringRef DeviceName) {
.Case("aml", "INTEL_GPU_AML")
.Case("cml", "INTEL_GPU_CML")
.Case("icllp", "INTEL_GPU_ICLLP")
.Case("ehl", "INTEL_GPU_EHL")
.Case("tgllp", "INTEL_GPU_TGLLP")
.Case("rkl", "INTEL_GPU_RKL")
.Case("adl_s", "INTEL_GPU_ADL_S")
Expand Down
4 changes: 0 additions & 4 deletions clang/test/Driver/sycl-oneapi-gpu.cpp
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Expand Up @@ -42,10 +42,6 @@
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_11_0_0 -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=icllp \
// RUN: -DMAC_STR=ICLLP
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_ehl -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=ehl -DMAC_STR=EHL
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_11_2_0 -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=ehl -DMAC_STR=EHL
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_tgllp -### %s 2>&1 | \
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=tgllp \
// RUN: -DMAC_STR=TGLLP
Expand Down
1 change: 0 additions & 1 deletion sycl/doc/UsersManual.md
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Expand Up @@ -46,7 +46,6 @@ and not recommended to use in production environment.
* intel_gpu_adl_s - Alder Lake S Intel graphics architecture
* intel_gpu_rkl - Rocket Lake Intel graphics architecture
* intel_gpu_tgllp, intel_gpu_12_0_0 - Tiger Lake Intel graphics architecture
* intel_gpu_ehl, intel_gpu_11_2_0 - Elkhart Lake Intel graphics architecture
* intel_gpu_icllp, intel_gpu_11_0_0 - Ice Lake Intel graphics architecture
* intel_gpu_cml, intel_gpu_9_7_0 - Comet Lake Intel graphics architecture
* intel_gpu_aml, intel_gpu_9_6_0 - Amber Lake Intel graphics architecture
Expand Down
3 changes: 0 additions & 3 deletions sycl/doc/design/DeviceIf.md
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Expand Up @@ -48,7 +48,6 @@ recognizes:
* `intel_gpu_aml`
* `intel_gpu_cml`
* `intel_gpu_icllp`
* `intel_gpu_ehl`
* `intel_gpu_tgllp`
* `intel_gpu_rkl`
* `intel_gpu_adl_s`
Expand All @@ -70,7 +69,6 @@ recognizes:
* `intel_gpu_9_6_0` (alias for `intel_gpu_aml`)
* `intel_gpu_9_7_0` (alias for `intel_gpu_cml`)
* `intel_gpu_11_0_0` (alias for `intel_gpu_icllp`)
* `intel_gpu_11_2_0` (alias for `intel_gpu_ehl`)
* `intel_gpu_12_0_0` (alias for `intel_gpu_tgllp`)
* `intel_gpu_12_10_0` (alias for `intel_gpu_dg1`)
* `nvidia_gpu_sm_50`
Expand Down Expand Up @@ -144,7 +142,6 @@ one of the following corresponding C++ macro names:
* `__SYCL_TARGET_INTEL_GPU_AML__`
* `__SYCL_TARGET_INTEL_GPU_CML__`
* `__SYCL_TARGET_INTEL_GPU_ICLLP__`
* `__SYCL_TARGET_INTEL_GPU_EHL__`
* `__SYCL_TARGET_INTEL_GPU_TGLLP__`
* `__SYCL_TARGET_INTEL_GPU_RKL__`
* `__SYCL_TARGET_INTEL_GPU_ADL_S__`
Expand Down
10 changes: 0 additions & 10 deletions sycl/doc/extensions/experimental/sycl_ext_oneapi_device_architecture.asciidoc
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Expand Up @@ -109,7 +109,6 @@ enum class architecture : /* unspecified */ {
intel_gpu_aml,
intel_gpu_cml,
intel_gpu_icllp,
intel_gpu_ehl,
intel_gpu_tgllp,
intel_gpu_rkl,
intel_gpu_adl_s,
Expand Down Expand Up @@ -170,7 +169,6 @@ enum class architecture : /* unspecified */ {
intel_gpu_9_6_0 = intel_gpu_aml,
intel_gpu_9_7_0 = intel_gpu_cml,
intel_gpu_11_0_0 = intel_gpu_icllp,
intel_gpu_11_2_0 = intel_gpu_ehl,
intel_gpu_12_0_0 = intel_gpu_tgllp,
intel_gpu_12_10_0 = intel_gpu_dg1
};
Expand Down Expand Up @@ -231,10 +229,6 @@ of these enumerators, and it provides a brief description of their meanings.
|-
|Ice Lake Intel graphics architecture.

|`intel_gpu_ehl`
|-
|Elkhart Lake Intel graphics architecture.

|`intel_gpu_tgllp`
|-
|Tiger Lake Intel graphics architecture.
Expand Down Expand Up @@ -319,10 +313,6 @@ of these enumerators, and it provides a brief description of their meanings.
|-
|Alias for `intel_gpu_icllp`.

|`intel_gpu_11_2_0`
|-
|Alias for `intel_gpu_ehl`.

|`intel_gpu_12_0_0`
|-
|Alias for `intel_gpu_tgllp`.
Expand Down
8 changes: 0 additions & 8 deletions sycl/include/sycl/ext/oneapi/experimental/device_architecture.hpp
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Expand Up @@ -18,7 +18,6 @@ enum class architecture {
intel_gpu_aml,
intel_gpu_cml,
intel_gpu_icllp,
intel_gpu_ehl,
intel_gpu_tgllp,
intel_gpu_rkl,
intel_gpu_adl_s,
Expand Down Expand Up @@ -79,7 +78,6 @@ enum class architecture {
intel_gpu_9_6_0 = intel_gpu_aml,
intel_gpu_9_7_0 = intel_gpu_cml,
intel_gpu_11_0_0 = intel_gpu_icllp,
intel_gpu_11_2_0 = intel_gpu_ehl,
intel_gpu_12_0_0 = intel_gpu_tgllp,
intel_gpu_12_10_0 = intel_gpu_dg1,
};
Expand Down Expand Up @@ -124,9 +122,6 @@ static constexpr ext::oneapi::experimental::architecture max_architecture =
#ifndef __SYCL_TARGET_INTEL_GPU_ICLLP__
#define __SYCL_TARGET_INTEL_GPU_ICLLP__ 0
#endif
#ifndef __SYCL_TARGET_INTEL_GPU_EHL__
#define __SYCL_TARGET_INTEL_GPU_EHL__ 0
#endif
#ifndef __SYCL_TARGET_INTEL_GPU_TGLLP__
#define __SYCL_TARGET_INTEL_GPU_TGLLP__ 0
#endif
Expand Down Expand Up @@ -286,7 +281,6 @@ static constexpr bool is_allowable_aot_mode =
(__SYCL_TARGET_INTEL_GPU_AML__ == 1) ||
(__SYCL_TARGET_INTEL_GPU_CML__ == 1) ||
(__SYCL_TARGET_INTEL_GPU_ICLLP__ == 1) ||
(__SYCL_TARGET_INTEL_GPU_EHL__ == 1) ||
(__SYCL_TARGET_INTEL_GPU_TGLLP__ == 1) ||
(__SYCL_TARGET_INTEL_GPU_RKL__ == 1) ||
(__SYCL_TARGET_INTEL_GPU_ADL_S__ == 1) ||
Expand Down Expand Up @@ -364,8 +358,6 @@ struct IsAOTForArchitectureClass {
__SYCL_TARGET_INTEL_GPU_CML__ == 1;
arr[static_cast<int>(arch::intel_gpu_icllp)] =
__SYCL_TARGET_INTEL_GPU_ICLLP__ == 1;
arr[static_cast<int>(arch::intel_gpu_ehl)] =
__SYCL_TARGET_INTEL_GPU_EHL__ == 1;
arr[static_cast<int>(arch::intel_gpu_tgllp)] =
__SYCL_TARGET_INTEL_GPU_TGLLP__ == 1;
arr[static_cast<int>(arch::intel_gpu_rkl)] =
Expand Down