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#include " SystemZInstrInfo.h"
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#include " SystemZSubtarget.h"
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#include " llvm/ADT/Statistic.h"
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- #include " llvm/CodeGen/LiveRegUnits .h"
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+ #include " llvm/CodeGen/LivePhysRegs .h"
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#include " llvm/CodeGen/MachineFunctionPass.h"
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#include " llvm/CodeGen/MachineInstrBuilder.h"
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using namespace llvm ;
@@ -161,8 +161,7 @@ bool SystemZPostRewrite::expandCondMove(MachineBasicBlock &MBB,
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assert (DestReg == MI.getOperand (1 ).getReg () &&
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" Expected destination and first source operand to be the same." );
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- const TargetRegisterInfo &TRI = TII->getRegisterInfo ();
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- LiveRegUnits LiveRegs (TRI);
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+ LivePhysRegs LiveRegs (TII->getRegisterInfo ());
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LiveRegs.addLiveOuts (MBB);
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for (auto I = std::prev (MBB.end ()); I != MBBI; --I)
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LiveRegs.stepBackward (*I);
@@ -172,18 +171,15 @@ bool SystemZPostRewrite::expandCondMove(MachineBasicBlock &MBB,
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MF.insert (std::next (MachineFunction::iterator (MBB)), RestMBB);
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RestMBB->splice (RestMBB->begin (), &MBB, MI, MBB.end ());
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RestMBB->transferSuccessors (&MBB);
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- const BitVector &BV = TRI.getAllocatableSet (MF);
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- for (Register Reg : BV.set_bits ())
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- if (!LiveRegs.available (Reg))
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- RestMBB->addLiveIn (Reg);
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+ for (MCPhysReg R : LiveRegs)
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+ RestMBB->addLiveIn (R);
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// Create a new block MoveMBB to hold the move instruction.
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MachineBasicBlock *MoveMBB = MF.CreateMachineBasicBlock (BB);
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MF.insert (std::next (MachineFunction::iterator (MBB)), MoveMBB);
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MoveMBB->addLiveIn (SrcReg);
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- for (Register Reg : BV.set_bits ())
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- if (!LiveRegs.available (Reg))
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- MoveMBB->addLiveIn (Reg);
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+ for (MCPhysReg R : LiveRegs)
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+ MoveMBB->addLiveIn (R);
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// At the end of MBB, create a conditional branch to RestMBB if the
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// condition is false, otherwise fall through to MoveMBB.
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