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| 1 | +// RUN: mlir-opt %s \ |
| 2 | +// RUN: -transform-interpreter -test-transform-dialect-erase-schedule \ |
| 3 | +// RUN: -canonicalize \ |
| 4 | +// RUN: -enable-arm-streaming="streaming-mode=streaming-locally za-mode=new-za" \ |
| 5 | +// RUN: -convert-vector-to-arm-sme -convert-arm-sme-to-scf \ |
| 6 | +// RUN: -convert-vector-to-scf -cse -arm-sve-legalize-vector-storage \ |
| 7 | +// RUN: -convert-arm-sme-to-llvm \ |
| 8 | +// RUN: -convert-vector-to-llvm=enable-arm-sve \ |
| 9 | +// RUN: -cse -canonicalize -allocate-arm-sme-tiles -test-lower-to-llvm | \ |
| 10 | +// RUN: %mcr_aarch64_cmd \ |
| 11 | +// RUN: -e=main -entry-point-result=void \ |
| 12 | +// RUN: -march=aarch64 -mattr="+sve,+sme" \ |
| 13 | +// RUN: -shared-libs=%mlir_runner_utils,%mlir_c_runner_utils,%arm_sme_abi_shlib | \ |
| 14 | +// RUN: FileCheck %s |
| 15 | + |
| 16 | +func.func @matmul(%A : tensor<?x?xf32>, %B : tensor<?x?xf32>, %C : tensor<?x?xf32>) { |
| 17 | + %res = linalg.matmul ins(%A, %B: tensor<?x?xf32>, tensor<?x?xf32>) |
| 18 | + outs(%C: tensor<?x?xf32>) -> tensor<?x?xf32> |
| 19 | + %xf = tensor.cast %res : tensor<?x?xf32> to tensor<*xf32> |
| 20 | + call @printMemrefF32(%xf) : (tensor<*xf32>) -> () |
| 21 | + return |
| 22 | +} |
| 23 | + |
| 24 | +func.func @main() attributes { enable_arm_streaming_ignore } { |
| 25 | + %c0 = arith.constant 0 : i32 |
| 26 | + %c7 = arith.constant 7 : index |
| 27 | + |
| 28 | + %A = arith.constant dense<[ |
| 29 | + [ 1., 8., 15., 22., 29., 36., 43., 50., 57., 64., 71., 78., 85.], |
| 30 | + [ 2., 9., 16., 23., 30., 37., 44., 51., 58., 65., 72., 79., 86.], |
| 31 | + [ 3., 10., 17., 24., 31., 38., 45., 52., 59., 66., 73., 80., 87.], |
| 32 | + [ 4., 11., 18., 25., 32., 39., 46., 53., 60., 67., 74., 81., 88.], |
| 33 | + [ 5., 12., 19., 26., 33., 40., 47., 54., 61., 68., 75., 82., 89.], |
| 34 | + [ 6., 13., 20., 27., 34., 41., 48., 55., 62., 69., 76., 83., 90.], |
| 35 | + [ 7., 14., 21., 28., 35., 42., 49., 56., 63., 70., 77., 84., 91.] |
| 36 | + ]> : tensor<7x13xf32> |
| 37 | + |
| 38 | + %B_init = tensor.empty() : tensor<13x7xf32> |
| 39 | + %B = linalg.transpose ins(%A: tensor<7x13xf32>) |
| 40 | + outs(%B_init: tensor<13x7xf32>) permutation = [1, 0] |
| 41 | + |
| 42 | + %A_dyn = tensor.cast %A : tensor<7x13xf32> to tensor<?x?xf32> |
| 43 | + %B_dyn = tensor.cast %B : tensor<13x7xf32> to tensor<?x?xf32> |
| 44 | + |
| 45 | + %C_init = bufferization.alloc_tensor(%c7, %c7) : tensor<?x?xf32> |
| 46 | + %C = linalg.fill ins(%c0 : i32) outs(%C_init : tensor<?x?xf32>) -> tensor<?x?xf32> |
| 47 | + |
| 48 | + // CHECK: Unranked Memref {{.*}} rank = 2 offset = 0 sizes = [7, 7] strides = [7, 1] data = |
| 49 | + // CHECK: [32955, 33514, 34073, 34632, 35191, 35750, 36309] |
| 50 | + // CHECK: [33514, 34086, 34658, 35230, 35802, 36374, 36946] |
| 51 | + // CHECK: [34073, 34658, 35243, 35828, 36413, 36998, 37583] |
| 52 | + // CHECK: [34632, 35230, 35828, 36426, 37024, 37622, 38220] |
| 53 | + // CHECK: [35191, 35802, 36413, 37024, 37635, 38246, 38857] |
| 54 | + // CHECK: [35750, 36374, 36998, 37622, 38246, 38870, 39494] |
| 55 | + // CHECK: [36309, 36946, 37583, 38220, 38857, 39494, 40131] |
| 56 | + call @matmul(%A_dyn, %B_dyn, %C) : (tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>) -> () |
| 57 | + |
| 58 | + return |
| 59 | +} |
| 60 | + |
| 61 | +module attributes {transform.with_named_sequence} { |
| 62 | + transform.named_sequence @__transform_main(%module : !transform.any_op {transform.consumed}) { |
| 63 | + %matmul = transform.structured.match ops{["linalg.matmul"]} in %module |
| 64 | + : (!transform.any_op) -> !transform.any_op |
| 65 | + |
| 66 | + // Step 1: Tile for size [4] x [4], which corresponds to SVLs x SVLs, where |
| 67 | + // SVLs is the number of 32-bit elements in a vector of SVL bits. |
| 68 | + %tiled_linalg_op, %loops:3 = transform.structured.tile_using_for %matmul[[4], [4], 1] |
| 69 | + : (!transform.any_op) -> (!transform.any_op, !transform.any_op, !transform.any_op, !transform.any_op) |
| 70 | + |
| 71 | + // Step 2: Vectorize. |
| 72 | + transform.structured.vectorize %tiled_linalg_op vector_sizes [[4], [4], 1] |
| 73 | + : !transform.any_op |
| 74 | + |
| 75 | + // Step 3: Bufferize ahead of TransferReadDropUnitDimsPattern, which |
| 76 | + // currently only supports memrefs. |
| 77 | + %bufferize = transform.bufferization.one_shot_bufferize %module |
| 78 | + {bufferize_function_boundaries=true} : (!transform.any_op) -> !transform.any_op |
| 79 | + |
| 80 | + %func = transform.structured.match ops{["func.func"]} in %bufferize |
| 81 | + : (!transform.any_op) -> !transform.any_op |
| 82 | + |
| 83 | + // Step 4: Lower vector.multi_reduction to vector.contract (+ some helpful patterns). |
| 84 | + transform.apply_patterns to %func { |
| 85 | + transform.apply_patterns.vector.lower_masked_transfers |
| 86 | + transform.apply_patterns.vector.transfer_permutation_patterns |
| 87 | + transform.apply_patterns.vector.reduction_to_contract |
| 88 | + } : !transform.any_op |
| 89 | + |
| 90 | + // Step 5: Lower vector.contract to vector.outerproduct. Also drop unit |
| 91 | + // dims, specifically to prevent vector.transfer_read of vector<[4]x1xf32>, |
| 92 | + // which can't be lowered in generic path. |
| 93 | + transform.apply_patterns to %func { |
| 94 | + transform.apply_patterns.vector.lower_contraction lowering_strategy = "outerproduct" |
| 95 | + transform.apply_patterns.vector.lower_masks |
| 96 | + transform.apply_patterns.vector.rank_reducing_subview_patterns |
| 97 | + } : !transform.any_op |
| 98 | + |
| 99 | + transform.yield |
| 100 | + } |
| 101 | +} |
| 102 | + |
| 103 | +func.func private @printMemrefF32(%ptr : tensor<*xf32>) |
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