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[AMDGPU][NewPM] Port SIShrinkInstructions to new pass manager. #106967
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Original file line number | Diff line number | Diff line change |
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//===- SIShrinkInstructions.h -----------------------------------*- C++- *-===// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
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#ifndef LLVM_LIB_TARGET_AMDGPU_SISHRINKINSTRUCTIONS_H | ||
#define LLVM_LIB_TARGET_AMDGPU_SISHRINKINSTRUCTIONS_H | ||
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#include "llvm/CodeGen/MachinePassManager.h" | ||
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namespace llvm { | ||
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class SIShrinkInstructionsPass | ||
: public PassInfoMixin<SIShrinkInstructionsPass> { | ||
public: | ||
SIShrinkInstructionsPass() = default; | ||
PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &); | ||
}; | ||
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} // namespace llvm | ||
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#endif // LLVM_LIB_TARGET_AMDGPU_SISHRINKINSTRUCTIONS_H |
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Shouldn't codegen pipeline builder take care of opt none? I am not sure when to use TM and Fcn attribute to decide pass invocatoin.
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This early exit is mainly to skip the optimization passes for -O0. This specific check hasOptNone checks for the function attribute Attribute::OptimizeNone, set to true for -O0 opt.levels. The attributes and metadata are still in the LLVM IR and not available in the MIR.