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[AMDGPU] Add tests for SIPreAllocateWWMRegs #109963

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Merged
merged 2 commits into from
Oct 22, 2024
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[AMDGPU] Add tests for SIPreAllocateWWMRegs #109963

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c789547
[AMDGPU] Add tests for SIPreAllocateWWMRegs
optimisan Sep 25, 2024
6169a44
Keep tests in one file
optimisan Oct 7, 2024
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49 changes: 49 additions & 0 deletions llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwm-regs.mir
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Original file line number Diff line number Diff line change
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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Best to remote this and remove the comment then

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What is remote?

# RUN: llc -mtriple=amdgcn -mcpu=tahiti -verify-machineinstrs -run-pass=si-pre-allocate-wwm-regs -o - %s | FileCheck %s
# RUN: llc -mtriple=amdgcn -mcpu=tahiti -verify-machineinstrs -amdgpu-prealloc-sgpr-spill-vgprs -run-pass=si-pre-allocate-wwm-regs -o - %s | FileCheck %s --check-prefix=CHECK2

# COM: auto-generated updates might remove checks for MachineFunctionInfo reserved registers.
---
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Add fixme to check the MachineFunctionInfo reserved register information

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Is it for WWM reserved registers?

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Yes

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But we have that already(?)

wwmReservedRegs:
  - '$vgpr0'

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Then you need to write manual checks for it. Update_mir_test_checks doesn't currently support the function level properties

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Added a comment for the manual check.


name: pre_allocate_wwm_regs_strict
tracksRegLiveness: true
body: |
bb.0:
liveins: $sgpr1
; CHECK-LABEL: name: pre_allocate_wwm_regs_strict
; CHECK: wwmReservedRegs:
; CHECK-NEXT: - '$vgpr0'
; CHECK: liveins: $sgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
; CHECK-NEXT: renamable $sgpr4_sgpr5 = ENTER_STRICT_WWM -1, implicit-def $exec, implicit-def $scc, implicit $exec
; CHECK-NEXT: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
; CHECK-NEXT: dead $vgpr0 = V_MOV_B32_dpp $vgpr0, [[DEF]], 323, 12, 15, 0, implicit $exec
; CHECK-NEXT: $exec = EXIT_STRICT_WWM killed renamable $sgpr4_sgpr5
; CHECK-NEXT: dead [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
%0:vgpr_32 = IMPLICIT_DEF
renamable $sgpr4_sgpr5 = ENTER_STRICT_WWM -1, implicit-def $exec, implicit-def $scc, implicit $exec
%1:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
%2:vgpr_32 = V_MOV_B32_dpp %1, %0, 323, 12, 15, 0, implicit $exec
$exec = EXIT_STRICT_WWM killed renamable $sgpr4_sgpr5
%3:vgpr_32 = COPY %0
...
---

name: pre_allocate_wwm_spill_to_vgpr
tracksRegLiveness: true
body: |
bb.0:
liveins: $sgpr1
; CHECK2-LABEL: name: pre_allocate_wwm_spill_to_vgpr
; CHECK2: wwmReservedRegs:
; CHECK2-NEXT: - '$vgpr0'
; CHECK2: liveins: $sgpr1
; CHECK2-NEXT: {{ $}}
; CHECK2-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
; CHECK2-NEXT: dead $vgpr0 = SI_SPILL_S32_TO_VGPR $sgpr1, 0, [[DEF]]
; CHECK2-NEXT: dead [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
%0:vgpr_32 = IMPLICIT_DEF
%1:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr1, 0, %0
%2:vgpr_32 = COPY %0
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Missing ... at end of function

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