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[RISCV] Remove getPostRAMutations #117527
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[RISCV] Remove getPostRAMutations #117527
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We are using `PostMachineScheduler` instead of `PostRAScheduler` since llvm#68696. The hook `getPostRAMutations` is only used in `PostRAScheduler` so it is actually dead code for RISC-V now.
@llvm/pr-subscribers-backend-risc-v Author: Pengcheng Wang (wangpc-pp) ChangesWe are using The hook Full diff: https://github.com/llvm/llvm-project/pull/117527.diff 2 Files Affected:
diff --git a/llvm/lib/Target/RISCV/RISCVSubtarget.cpp b/llvm/lib/Target/RISCV/RISCVSubtarget.cpp
index 03397e1e0d89ee..426d3682049046 100644
--- a/llvm/lib/Target/RISCV/RISCVSubtarget.cpp
+++ b/llvm/lib/Target/RISCV/RISCVSubtarget.cpp
@@ -186,11 +186,6 @@ bool RISCVSubtarget::useRVVForFixedLengthVectors() const {
bool RISCVSubtarget::enableSubRegLiveness() const { return true; }
-void RISCVSubtarget::getPostRAMutations(
- std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) const {
- Mutations.push_back(createMacroFusionDAGMutation(getMacroFusions()));
-}
-
/// Enable use of alias analysis during code generation (during MI
/// scheduling, DAGCombine, etc.).
bool RISCVSubtarget::useAA() const { return UseAA; }
diff --git a/llvm/lib/Target/RISCV/RISCVSubtarget.h b/llvm/lib/Target/RISCV/RISCVSubtarget.h
index f2c0a3d85c998a..043838e13b964d 100644
--- a/llvm/lib/Target/RISCV/RISCVSubtarget.h
+++ b/llvm/lib/Target/RISCV/RISCVSubtarget.h
@@ -301,9 +301,6 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo {
bool enableSubRegLiveness() const override;
- void getPostRAMutations(std::vector<std::unique_ptr<ScheduleDAGMutation>>
- &Mutations) const override;
-
bool useAA() const override;
unsigned getCacheLineSize() const override {
|
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LGTM
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LGTM.
On another note, have we looked at using the MacroFusionDAGMutation for PostMachineSched?
It's handled in |
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LGTM
We are using
PostMachineScheduler
instead ofPostRAScheduler
since #68696.
The hook
getPostRAMutations
is only used inPostRAScheduler
soit is actually dead code for RISC-V now.