[TargetLowering] Return Align from getByValTypeAlignment (NFC) #119233
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llvmbot
added
backend:PowerPC
backend:X86
llvm:globalisel
llvm:SelectionDAG
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@llvm/pr-subscribers-llvm-selectiondag @llvm/pr-subscribers-backend-powerpc Author: Sergei Barannikov (s-barannikov) ChangesFull diff: https://github.com/llvm/llvm-project/pull/119233.diff 9 Files Affected:
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index a207f3886bd0e8..87f026f718dd1f 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -1720,10 +1720,9 @@ class TargetLoweringBase {
return getValueType(DL, Ty, AllowUnknown).getSimpleVT();
}
- /// Return the desired alignment for ByVal or InAlloca aggregate function
- /// arguments in the caller parameter area. This is the actual alignment, not
- /// its logarithm.
- virtual uint64_t getByValTypeAlignment(Type *Ty, const DataLayout &DL) const;
+ /// Returns the desired alignment for ByVal or InAlloca aggregate function
+ /// arguments in the caller parameter area.
+ virtual Align getByValTypeAlignment(Type *Ty, const DataLayout &DL) const;
/// Return the type of registers that this ValueType will eventually require.
MVT getRegisterType(MVT VT) const {
diff --git a/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp b/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
index 5126aba3658c14..d17b20d977ce99 100644
--- a/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
@@ -258,7 +258,7 @@ void CallLowering::setArgFlags(CallLowering::ArgInfo &Arg, unsigned OpIdx,
else if ((ParamAlign = FuncInfo.getParamAlign(ParamIdx)))
MemAlign = *ParamAlign;
else
- MemAlign = Align(getTLI()->getByValTypeAlignment(ElementTy, DL));
+ MemAlign = getTLI()->getByValTypeAlignment(ElementTy, DL);
} else if (OpIdx >= AttributeList::FirstArgIndex) {
if (auto ParamAlign =
FuncInfo.getParamStackAlign(OpIdx - AttributeList::FirstArgIndex))
diff --git a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
index d5551758c073e9..2480a94546c592 100644
--- a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -1078,7 +1078,7 @@ bool FastISel::lowerCallTo(CallLoweringInfo &CLI) {
// For ByVal, alignment should come from FE. BE will guess if this info
// is not there, but there are cases it cannot get right.
if (!MemAlign)
- MemAlign = Align(TLI.getByValTypeAlignment(Arg.IndirectType, DL));
+ MemAlign = TLI.getByValTypeAlignment(Arg.IndirectType, DL);
Flags.setByValSize(FrameSize);
} else if (!MemAlign) {
MemAlign = DL.getABITypeAlign(Arg.Ty);
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index b72c5eff22f183..519e828cc35bc9 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -11197,7 +11197,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
if (auto MA = Args[i].Alignment)
MemAlign = *MA;
else
- MemAlign = Align(getByValTypeAlignment(Args[i].IndirectType, DL));
+ MemAlign = getByValTypeAlignment(Args[i].IndirectType, DL);
} else if (auto MA = Args[i].Alignment) {
MemAlign = *MA;
} else {
@@ -11754,7 +11754,7 @@ void SelectionDAGISel::LowerArguments(const Function &F) {
else if ((ParamAlign = Arg.getParamAlign()))
MemAlign = *ParamAlign;
else
- MemAlign = Align(TLI->getByValTypeAlignment(ArgMemTy, DL));
+ MemAlign = TLI->getByValTypeAlignment(ArgMemTy, DL);
if (Flags.isByRef())
Flags.setByRefSize(MemSize);
else
diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp
index 392cfbdd21273d..9dc2701654b8b9 100644
--- a/llvm/lib/CodeGen/TargetLoweringBase.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp
@@ -1697,12 +1697,9 @@ void llvm::GetReturnInfo(CallingConv::ID CC, Type *ReturnType,
}
}
-/// getByValTypeAlignment - Return the desired alignment for ByVal aggregate
-/// function arguments in the caller parameter area. This is the actual
-/// alignment, not its logarithm.
-uint64_t TargetLoweringBase::getByValTypeAlignment(Type *Ty,
- const DataLayout &DL) const {
- return DL.getABITypeAlign(Ty).value();
+Align TargetLoweringBase::getByValTypeAlignment(Type *Ty,
+ const DataLayout &DL) const {
+ return DL.getABITypeAlign(Ty);
}
bool TargetLoweringBase::allowsMemoryAccessForAlignment(
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 14e09d502b696b..2af983fc7b04e8 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -1638,14 +1638,14 @@ static void getMaxByValAlign(Type *Ty, Align &MaxAlign, Align MaxMaxAlign) {
/// getByValTypeAlignment - Return the desired alignment for ByVal aggregate
/// function arguments in the caller parameter area.
-uint64_t PPCTargetLowering::getByValTypeAlignment(Type *Ty,
- const DataLayout &DL) const {
+Align PPCTargetLowering::getByValTypeAlignment(Type *Ty,
+ const DataLayout &DL) const {
// 16byte and wider vectors are passed on 16byte boundary.
// The rest is 8 on PPC64 and 4 on PPC32 boundary.
Align Alignment = Subtarget.isPPC64() ? Align(8) : Align(4);
if (Subtarget.hasAltivec())
getMaxByValAlign(Ty, Alignment, Align(16));
- return Alignment.value();
+ return Alignment;
}
bool PPCTargetLowering::useSoftFloat() const {
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h
index 1c63444db427db..8f41fc107a6918 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.h
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h
@@ -985,10 +985,8 @@ namespace llvm {
StringRef Constraint, MVT VT) const override;
/// getByValTypeAlignment - Return the desired alignment for ByVal aggregate
- /// function arguments in the caller parameter area. This is the actual
- /// alignment, not its logarithm.
- uint64_t getByValTypeAlignment(Type *Ty,
- const DataLayout &DL) const override;
+ /// function arguments in the caller parameter area.
+ Align getByValTypeAlignment(Type *Ty, const DataLayout &DL) const override;
/// LowerAsmOperandForConstraint - Lower the specified operand into the Ops
/// vector. If it is invalid, don't add anything to Ops.
diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h
index 2db25d6dda061a..d154ee9745b978 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.h
+++ b/llvm/lib/Target/X86/X86ISelLowering.h
@@ -1079,8 +1079,7 @@ namespace llvm {
/// function arguments in the caller parameter area. For X86, aggregates
/// that contains are placed at 16-byte boundaries while the rest are at
/// 4-byte boundaries.
- uint64_t getByValTypeAlignment(Type *Ty,
- const DataLayout &DL) const override;
+ Align getByValTypeAlignment(Type *Ty, const DataLayout &DL) const override;
EVT getOptimalMemOpType(const MemOp &Op,
const AttributeList &FuncAttributes) const override;
diff --git a/llvm/lib/Target/X86/X86ISelLoweringCall.cpp b/llvm/lib/Target/X86/X86ISelLoweringCall.cpp
index 8a764de561413b..05a5a36ce5cbe4 100644
--- a/llvm/lib/Target/X86/X86ISelLoweringCall.cpp
+++ b/llvm/lib/Target/X86/X86ISelLoweringCall.cpp
@@ -262,20 +262,15 @@ static void getMaxByValAlign(Type *Ty, Align &MaxAlign) {
/// function arguments in the caller parameter area. For X86, aggregates
/// that contain SSE vectors are placed at 16-byte boundaries while the rest
/// are at 4-byte boundaries.
-uint64_t X86TargetLowering::getByValTypeAlignment(Type *Ty,
- const DataLayout &DL) const {
- if (Subtarget.is64Bit()) {
- // Max of 8 and alignment of type.
- Align TyAlign = DL.getABITypeAlign(Ty);
- if (TyAlign > 8)
- return TyAlign.value();
- return 8;
- }
+Align X86TargetLowering::getByValTypeAlignment(Type *Ty,
+ const DataLayout &DL) const {
+ if (Subtarget.is64Bit())
+ return std::max(DL.getABITypeAlign(Ty), Align::Constant<8>());
Align Alignment(4);
if (Subtarget.hasSSE1())
getMaxByValAlign(Ty, Alignment);
- return Alignment.value();
+ return Alignment;
}
/// It returns EVT::Other if the type should be determined using generic
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