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[TargetLowering] Return Align from getByValTypeAlignment (NFC) #119233

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Dec 9, 2024
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7 changes: 3 additions & 4 deletions llvm/include/llvm/CodeGen/TargetLowering.h
Original file line number Diff line number Diff line change
Expand Up @@ -1720,10 +1720,9 @@ class TargetLoweringBase {
return getValueType(DL, Ty, AllowUnknown).getSimpleVT();
}

/// Return the desired alignment for ByVal or InAlloca aggregate function
/// arguments in the caller parameter area. This is the actual alignment, not
/// its logarithm.
virtual uint64_t getByValTypeAlignment(Type *Ty, const DataLayout &DL) const;
/// Returns the desired alignment for ByVal or InAlloca aggregate function
/// arguments in the caller parameter area.
virtual Align getByValTypeAlignment(Type *Ty, const DataLayout &DL) const;

/// Return the type of registers that this ValueType will eventually require.
MVT getRegisterType(MVT VT) const {
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2 changes: 1 addition & 1 deletion llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -258,7 +258,7 @@ void CallLowering::setArgFlags(CallLowering::ArgInfo &Arg, unsigned OpIdx,
else if ((ParamAlign = FuncInfo.getParamAlign(ParamIdx)))
MemAlign = *ParamAlign;
else
MemAlign = Align(getTLI()->getByValTypeAlignment(ElementTy, DL));
MemAlign = getTLI()->getByValTypeAlignment(ElementTy, DL);
} else if (OpIdx >= AttributeList::FirstArgIndex) {
if (auto ParamAlign =
FuncInfo.getParamStackAlign(OpIdx - AttributeList::FirstArgIndex))
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2 changes: 1 addition & 1 deletion llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1078,7 +1078,7 @@ bool FastISel::lowerCallTo(CallLoweringInfo &CLI) {
// For ByVal, alignment should come from FE. BE will guess if this info
// is not there, but there are cases it cannot get right.
if (!MemAlign)
MemAlign = Align(TLI.getByValTypeAlignment(Arg.IndirectType, DL));
MemAlign = TLI.getByValTypeAlignment(Arg.IndirectType, DL);
Flags.setByValSize(FrameSize);
} else if (!MemAlign) {
MemAlign = DL.getABITypeAlign(Arg.Ty);
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4 changes: 2 additions & 2 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -11197,7 +11197,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
if (auto MA = Args[i].Alignment)
MemAlign = *MA;
else
MemAlign = Align(getByValTypeAlignment(Args[i].IndirectType, DL));
MemAlign = getByValTypeAlignment(Args[i].IndirectType, DL);
} else if (auto MA = Args[i].Alignment) {
MemAlign = *MA;
} else {
Expand Down Expand Up @@ -11754,7 +11754,7 @@ void SelectionDAGISel::LowerArguments(const Function &F) {
else if ((ParamAlign = Arg.getParamAlign()))
MemAlign = *ParamAlign;
else
MemAlign = Align(TLI->getByValTypeAlignment(ArgMemTy, DL));
MemAlign = TLI->getByValTypeAlignment(ArgMemTy, DL);
if (Flags.isByRef())
Flags.setByRefSize(MemSize);
else
Expand Down
9 changes: 3 additions & 6 deletions llvm/lib/CodeGen/TargetLoweringBase.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1697,12 +1697,9 @@ void llvm::GetReturnInfo(CallingConv::ID CC, Type *ReturnType,
}
}

/// getByValTypeAlignment - Return the desired alignment for ByVal aggregate
/// function arguments in the caller parameter area. This is the actual
/// alignment, not its logarithm.
uint64_t TargetLoweringBase::getByValTypeAlignment(Type *Ty,
const DataLayout &DL) const {
return DL.getABITypeAlign(Ty).value();
Align TargetLoweringBase::getByValTypeAlignment(Type *Ty,
const DataLayout &DL) const {
return DL.getABITypeAlign(Ty);
}

bool TargetLoweringBase::allowsMemoryAccessForAlignment(
Expand Down
6 changes: 3 additions & 3 deletions llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1638,14 +1638,14 @@ static void getMaxByValAlign(Type *Ty, Align &MaxAlign, Align MaxMaxAlign) {

/// getByValTypeAlignment - Return the desired alignment for ByVal aggregate
/// function arguments in the caller parameter area.
uint64_t PPCTargetLowering::getByValTypeAlignment(Type *Ty,
const DataLayout &DL) const {
Align PPCTargetLowering::getByValTypeAlignment(Type *Ty,
const DataLayout &DL) const {
// 16byte and wider vectors are passed on 16byte boundary.
// The rest is 8 on PPC64 and 4 on PPC32 boundary.
Align Alignment = Subtarget.isPPC64() ? Align(8) : Align(4);
if (Subtarget.hasAltivec())
getMaxByValAlign(Ty, Alignment, Align(16));
return Alignment.value();
return Alignment;
}

bool PPCTargetLowering::useSoftFloat() const {
Expand Down
6 changes: 2 additions & 4 deletions llvm/lib/Target/PowerPC/PPCISelLowering.h
Original file line number Diff line number Diff line change
Expand Up @@ -985,10 +985,8 @@ namespace llvm {
StringRef Constraint, MVT VT) const override;

/// getByValTypeAlignment - Return the desired alignment for ByVal aggregate
/// function arguments in the caller parameter area. This is the actual
/// alignment, not its logarithm.
uint64_t getByValTypeAlignment(Type *Ty,
const DataLayout &DL) const override;
/// function arguments in the caller parameter area.
Align getByValTypeAlignment(Type *Ty, const DataLayout &DL) const override;

/// LowerAsmOperandForConstraint - Lower the specified operand into the Ops
/// vector. If it is invalid, don't add anything to Ops.
Expand Down
3 changes: 1 addition & 2 deletions llvm/lib/Target/X86/X86ISelLowering.h
Original file line number Diff line number Diff line change
Expand Up @@ -1079,8 +1079,7 @@ namespace llvm {
/// function arguments in the caller parameter area. For X86, aggregates
/// that contains are placed at 16-byte boundaries while the rest are at
/// 4-byte boundaries.
uint64_t getByValTypeAlignment(Type *Ty,
const DataLayout &DL) const override;
Align getByValTypeAlignment(Type *Ty, const DataLayout &DL) const override;

EVT getOptimalMemOpType(const MemOp &Op,
const AttributeList &FuncAttributes) const override;
Expand Down
15 changes: 5 additions & 10 deletions llvm/lib/Target/X86/X86ISelLoweringCall.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -262,20 +262,15 @@ static void getMaxByValAlign(Type *Ty, Align &MaxAlign) {
/// function arguments in the caller parameter area. For X86, aggregates
/// that contain SSE vectors are placed at 16-byte boundaries while the rest
/// are at 4-byte boundaries.
uint64_t X86TargetLowering::getByValTypeAlignment(Type *Ty,
const DataLayout &DL) const {
if (Subtarget.is64Bit()) {
// Max of 8 and alignment of type.
Align TyAlign = DL.getABITypeAlign(Ty);
if (TyAlign > 8)
return TyAlign.value();
return 8;
}
Align X86TargetLowering::getByValTypeAlignment(Type *Ty,
const DataLayout &DL) const {
if (Subtarget.is64Bit())
return std::max(DL.getABITypeAlign(Ty), Align::Constant<8>());

Align Alignment(4);
if (Subtarget.hasSSE1())
getMaxByValAlign(Ty, Alignment);
return Alignment.value();
return Alignment;
}

/// It returns EVT::Other if the type should be determined using generic
Expand Down
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