[RISCV][VLOPT] Add vfirst and vcpop to getOperandInfo

[michaelmaitland]

No description provided.

[llvmbot]

@llvm/pr-subscribers-backend-risc-v

Author: Michael Maitland (michaelmaitland)

Changes

---

Full diff: https://github.com/llvm/llvm-project/pull/122295.diff

2 Files Affected:

• (modified) llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp (+4)
• (modified) llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir (+60)

diff --git a/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp b/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
index 9a0938bc38dd45..2c04dd062670f0 100644
--- a/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
+++ b/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
@@ -488,6 +488,10 @@ getOperandLog2EEW(const MachineOperand &MO, const MachineRegisterInfo *MRI) {
   case RISCV::VFCVT_F_X_V:
   // Vector Floating-Point Merge Instruction
   case RISCV::VFMERGE_VFM:
+  // Vector count population in mask vcpop.m
+  // vfirst find-first-set mask bit
+  case RISCV::VCPOP_M:
+  case RISCV::VFIRST_M:
     return MILog2SEW;
 
   // Vector Widening Integer Add/Subtract
diff --git a/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir b/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
index 2359fae9389d06..3a5dd2a1c01a73 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
@@ -1438,3 +1438,63 @@ body: |
     %x:vr = nofpexcept PseudoVFCVT_X_F_V_M1 $noreg, $noreg, 0, -1, 5 /* e32 */, 0
     %y:vr = PseudoVFREDMAX_VS_MF2_E32 $noreg, %x, %x, 1, 5 /* e32 */, 0
 ...
+---
+name: vfirst_v
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: vfirst_v
+    ; CHECK: %x:vr = PseudoVMAND_MM_B8 $noreg, $noreg, 1, 0 /* e8 */
+    ; CHECK-NEXT: %y:gpr = PseudoVFIRST_M_B8 %x, 1, 0 /* e8 */
+    %x:vr = PseudoVMAND_MM_B8 $noreg, $noreg, -1, 0
+    %y:gpr = PseudoVFIRST_M_B8 %x, 1, 0
+...
+---
+name: vfirst_v_incompatible_eew
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: vfirst_v_incompatible_eew
+    ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 /* tu, mu */
+    ; CHECK-NEXT: %y:gpr = PseudoVFIRST_M_B8 %x, 1, 0 /* e8 */
+    %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0
+    %y:gpr = PseudoVFIRST_M_B8 %x, 1, 0
+...
+---
+name: vfirst_v_incompaitble_emul
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: vfirst_v_incompaitble_emul
+    ; CHECK: %x:vr = PseudoVMAND_MM_B8 $noreg, $noreg, -1, 0 /* e8 */
+    ; CHECK-NEXT: %y:gpr = PseudoVFIRST_M_B16 %x, 1, 0 /* e8 */
+    %x:vr = PseudoVMAND_MM_B8 $noreg, $noreg, -1, 0
+    %y:gpr = PseudoVFIRST_M_B16 %x, 1, 0
+...
+---
+name: vcpop_v
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: vcpop_v
+    ; CHECK: %x:vr = PseudoVMAND_MM_B8 $noreg, $noreg, 1, 0 /* e8 */
+    ; CHECK-NEXT: %y:gpr = PseudoVCPOP_M_B8 %x, 1, 0 /* e8 */
+    %x:vr = PseudoVMAND_MM_B8 $noreg, $noreg, -1, 0
+    %y:gpr = PseudoVCPOP_M_B8 %x, 1, 0
+...
+---
+name: vcopop_v_incompatible_eew
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: vcopop_v_incompatible_eew
+    ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 /* tu, mu */
+    ; CHECK-NEXT: %y:gpr = PseudoVCPOP_M_B8 %x, 1, 0 /* e8 */
+    %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0
+    %y:gpr = PseudoVCPOP_M_B8 %x, 1, 0
+...
+---
+name: vcpop_v_incompaitble_emul
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: vcpop_v_incompaitble_emul
+    ; CHECK: %x:vr = PseudoVMAND_MM_B8 $noreg, $noreg, -1, 0 /* e8 */
+    ; CHECK-NEXT: %y:gpr = PseudoVCPOP_M_B16 %x, 1, 0 /* e8 */
+    %x:vr = PseudoVMAND_MM_B8 $noreg, $noreg, -1, 0
+    %y:gpr = PseudoVCPOP_M_B16 %x, 1, 0
+...

[preames]

LGTM w/one inline thing to confirm before landing.

[preames]

Shouldn't the source operand for these both be a mask operand and thus 0? Or is it the case that the MILog2SEW is guaranteed to be zero in this case?

After thinking about it for a bit, I think that is the case. Please confirm, but consider this a non-blocking comment as long as that is in fact true.

[michaelmaitland]

Or is it the case that the MILog2SEW is guaranteed to be zero in this case?

That is correct. And since the source operand may not be vmv0, we need to handle it here.

[topperc]

incompatible*

[topperc]

LGTM