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LICM: teach hoistMinMax about samesign #122730
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Follow up on 4a0d53a (PatternMatch: migrate to CmpPredicate) to get rid of one of the FIXMEs it introduced by replacing a predicate comparison with CmpPredicate::getMatching.
@llvm/pr-subscribers-llvm-transforms Author: Ramkumar Ramachandra (artagnon) ChangesFollow up on 4a0d53a (PatternMatch: migrate to CmpPredicate) to get rid of one of the FIXMEs it introduced by replacing a predicate comparison with CmpPredicate::getMatching. Full diff: https://github.com/llvm/llvm-project/pull/122730.diff 2 Files Affected:
diff --git a/llvm/lib/Transforms/Scalar/LICM.cpp b/llvm/lib/Transforms/Scalar/LICM.cpp
index a5d5eecb1ebf82..575c44f63af13f 100644
--- a/llvm/lib/Transforms/Scalar/LICM.cpp
+++ b/llvm/lib/Transforms/Scalar/LICM.cpp
@@ -2453,8 +2453,8 @@ static bool hoistMinMax(Instruction &I, Loop &L, ICFLoopSafetyInfo &SafetyInfo,
if (!MatchICmpAgainstInvariant(Cond1, P1, LHS1, RHS1) ||
!MatchICmpAgainstInvariant(Cond2, P2, LHS2, RHS2))
return false;
- // FIXME: Use CmpPredicate::getMatching here.
- if (P1 != static_cast<CmpInst::Predicate>(P2) || LHS1 != LHS2)
+ auto MatchingPred = CmpPredicate::getMatching(P1, P2);
+ if (!MatchingPred || LHS1 != LHS2)
return false;
// Everything is fine, we can do the transform.
@@ -2462,7 +2462,7 @@ static bool hoistMinMax(Instruction &I, Loop &L, ICFLoopSafetyInfo &SafetyInfo,
assert(
(UseMin || ICmpInst::isGT(P1) || ICmpInst::isGE(P1)) &&
"Relational predicate is either less (or equal) or greater (or equal)!");
- Intrinsic::ID id = ICmpInst::isSigned(P1)
+ Intrinsic::ID id = ICmpInst::isSigned(*MatchingPred)
? (UseMin ? Intrinsic::smin : Intrinsic::smax)
: (UseMin ? Intrinsic::umin : Intrinsic::umax);
auto *Preheader = L.getLoopPreheader();
@@ -2479,7 +2479,7 @@ static bool hoistMinMax(Instruction &I, Loop &L, ICFLoopSafetyInfo &SafetyInfo,
(ICmpInst::isSigned(P1) ? "s" : "u") +
(UseMin ? "min" : "max"));
Builder.SetInsertPoint(&I);
- ICmpInst::Predicate P = P1;
+ ICmpInst::Predicate P = *MatchingPred;
if (Inverse)
P = ICmpInst::getInversePredicate(P);
Value *NewCond = Builder.CreateICmp(P, LHS1, NewRHS);
diff --git a/llvm/test/Transforms/LICM/min_max.ll b/llvm/test/Transforms/LICM/min_max.ll
index c2bf0a7f20cc12..4c55f7a29c7fe0 100644
--- a/llvm/test/Transforms/LICM/min_max.ll
+++ b/llvm/test/Transforms/LICM/min_max.ll
@@ -242,6 +242,35 @@ exit:
ret i32 %iv
}
+define i32 @test_sgt_samesign(i32 %start, i32 %inv_1, i32 %inv_2) {
+; CHECK-LABEL: @test_sgt_samesign(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[INVARIANT_UMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[INV_1:%.*]], i32 [[INV_2:%.*]])
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[START:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp sgt i32 [[IV]], [[INVARIANT_UMAX]]
+; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
+; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i32 [ [[IV]], [[LOOP]] ]
+; CHECK-NEXT: ret i32 [[IV_LCSSA]]
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i32 [%start, %entry], [%iv.next, %loop]
+ %cmp_1 = icmp samesign ugt i32 %iv, %inv_1
+ %cmp_2 = icmp sgt i32 %iv, %inv_2
+ %loop_cond = and i1 %cmp_1, %cmp_2
+ %iv.next = add i32 %iv, 1
+ br i1 %loop_cond, label %loop, label %exit
+
+exit:
+ ret i32 %iv
+}
+
; turn to %iv >=s smax(inv_1, inv_2) and hoist it out of loop.
define i32 @test_sge(i32 %start, i32 %inv_1, i32 %inv_2) {
; CHECK-LABEL: @test_sge(
@@ -272,6 +301,35 @@ exit:
ret i32 %iv
}
+define i32 @test_sge_samesign(i32 %start, i32 %inv_1, i32 %inv_2) {
+; CHECK-LABEL: @test_sge_samesign(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[INV_1:%.*]] = call i32 @llvm.smax.i32(i32 [[INV_3:%.*]], i32 [[INV_2:%.*]])
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[START:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[CMP_1:%.*]] = icmp sge i32 [[IV]], [[INV_1]]
+; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
+; CHECK-NEXT: br i1 [[CMP_1]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i32 [ [[IV]], [[LOOP]] ]
+; CHECK-NEXT: ret i32 [[IV_LCSSA]]
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i32 [%start, %entry], [%iv.next, %loop]
+ %cmp_1 = icmp sge i32 %iv, %inv_1
+ %cmp_2 = icmp samesign uge i32 %iv, %inv_2
+ %loop_cond = and i1 %cmp_1, %cmp_2
+ %iv.next = add i32 %iv, 1
+ br i1 %loop_cond, label %loop, label %exit
+
+exit:
+ ret i32 %iv
+}
+
; Turn OR to AND and handle accordingly.
define i32 @test_ult_inv(i32 %start, i32 %inv_1, i32 %inv_2) {
; CHECK-LABEL: @test_ult_inv(
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LGTM
Follow up on 4a0d53a (PatternMatch: migrate to CmpPredicate) to get rid of one of the FIXMEs it introduced by replacing a predicate comparison with CmpPredicate::getMatching.