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merged 3 commits into from
Jan 13, 2025
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LICM: teach hoistMinMax about samesign #122730

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798e9c7
LICM: pre-commit tests for samesign-getMatching
artagnon Jan 13, 2025
85de949
LICM: teach hoistMinMax about samesign
artagnon Jan 13, 2025
94ecfb0
LICM: address review
artagnon Jan 13, 2025
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20 changes: 11 additions & 9 deletions llvm/lib/Transforms/Scalar/LICM.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2453,16 +2453,17 @@ static bool hoistMinMax(Instruction &I, Loop &L, ICFLoopSafetyInfo &SafetyInfo,
if (!MatchICmpAgainstInvariant(Cond1, P1, LHS1, RHS1) ||
!MatchICmpAgainstInvariant(Cond2, P2, LHS2, RHS2))
return false;
// FIXME: Use CmpPredicate::getMatching here.
if (P1 != static_cast<CmpInst::Predicate>(P2) || LHS1 != LHS2)
auto MatchingPred = CmpPredicate::getMatching(P1, P2);
if (!MatchingPred || LHS1 != LHS2)
return false;

// Everything is fine, we can do the transform.
bool UseMin = ICmpInst::isLT(P1) || ICmpInst::isLE(P1);
bool UseMin = ICmpInst::isLT(*MatchingPred) || ICmpInst::isLE(*MatchingPred);
assert(
(UseMin || ICmpInst::isGT(P1) || ICmpInst::isGE(P1)) &&
(UseMin || ICmpInst::isGT(*MatchingPred) ||
ICmpInst::isGE(*MatchingPred)) &&
"Relational predicate is either less (or equal) or greater (or equal)!");
Intrinsic::ID id = ICmpInst::isSigned(P1)
Intrinsic::ID id = ICmpInst::isSigned(*MatchingPred)
? (UseMin ? Intrinsic::smin : Intrinsic::smax)
: (UseMin ? Intrinsic::umin : Intrinsic::umax);
auto *Preheader = L.getLoopPreheader();
Expand All @@ -2475,11 +2476,12 @@ static bool hoistMinMax(Instruction &I, Loop &L, ICFLoopSafetyInfo &SafetyInfo,
if (isa<SelectInst>(I))
RHS2 = Builder.CreateFreeze(RHS2, RHS2->getName() + ".fr");
Value *NewRHS = Builder.CreateBinaryIntrinsic(
id, RHS1, RHS2, nullptr, StringRef("invariant.") +
(ICmpInst::isSigned(P1) ? "s" : "u") +
(UseMin ? "min" : "max"));
id, RHS1, RHS2, nullptr,
StringRef("invariant.") +
(ICmpInst::isSigned(*MatchingPred) ? "s" : "u") +
(UseMin ? "min" : "max"));
Builder.SetInsertPoint(&I);
ICmpInst::Predicate P = P1;
ICmpInst::Predicate P = *MatchingPred;
if (Inverse)
P = ICmpInst::getInversePredicate(P);
Value *NewCond = Builder.CreateICmp(P, LHS1, NewRHS);
Expand Down
58 changes: 58 additions & 0 deletions llvm/test/Transforms/LICM/min_max.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -242,6 +242,35 @@ exit:
ret i32 %iv
}

define i32 @test_sgt_samesign(i32 %start, i32 %inv_1, i32 %inv_2) {
; CHECK-LABEL: @test_sgt_samesign(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[INVARIANT_SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[INV_1:%.*]], i32 [[INV_2:%.*]])
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[START:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp sgt i32 [[IV]], [[INVARIANT_SMAX]]
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i32 [ [[IV]], [[LOOP]] ]
; CHECK-NEXT: ret i32 [[IV_LCSSA]]
;
entry:
br label %loop

loop:
%iv = phi i32 [%start, %entry], [%iv.next, %loop]
%cmp_1 = icmp samesign ugt i32 %iv, %inv_1
%cmp_2 = icmp sgt i32 %iv, %inv_2
%loop_cond = and i1 %cmp_1, %cmp_2
%iv.next = add i32 %iv, 1
br i1 %loop_cond, label %loop, label %exit

exit:
ret i32 %iv
}

; turn to %iv >=s smax(inv_1, inv_2) and hoist it out of loop.
define i32 @test_sge(i32 %start, i32 %inv_1, i32 %inv_2) {
; CHECK-LABEL: @test_sge(
Expand Down Expand Up @@ -272,6 +301,35 @@ exit:
ret i32 %iv
}

define i32 @test_sge_samesign(i32 %start, i32 %inv_1, i32 %inv_2) {
; CHECK-LABEL: @test_sge_samesign(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[INVARIANT_SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[INV_1:%.*]], i32 [[INV_2:%.*]])
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[START:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp sge i32 [[IV]], [[INVARIANT_SMAX]]
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i32 [ [[IV]], [[LOOP]] ]
; CHECK-NEXT: ret i32 [[IV_LCSSA]]
;
entry:
br label %loop

loop:
%iv = phi i32 [%start, %entry], [%iv.next, %loop]
%cmp_1 = icmp sge i32 %iv, %inv_1
%cmp_2 = icmp samesign uge i32 %iv, %inv_2
%loop_cond = and i1 %cmp_1, %cmp_2
%iv.next = add i32 %iv, 1
br i1 %loop_cond, label %loop, label %exit

exit:
ret i32 %iv
}

; Turn OR to AND and handle accordingly.
define i32 @test_ult_inv(i32 %start, i32 %inv_1, i32 %inv_2) {
; CHECK-LABEL: @test_ult_inv(
Expand Down
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