[AMDGPU] Fix llvm.amdgcn.workitem.id-unsupported-calling-convention.ll

[ro-i]

Follow-up fix for #126058. (@arsenm)

[llvmbot]

@llvm/pr-subscribers-backend-amdgpu

Author: Robert Imschweiler (ro-i)

Changes

Follow-up fix for #126058. (@arsenm)

---

Full diff: https://github.com/llvm/llvm-project/pull/127041.diff

1 Files Affected:

• (modified) llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id-unsupported-calling-convention.ll (+14-45)

diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id-unsupported-calling-convention.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id-unsupported-calling-convention.ll
index 684b59c66ee8e..4534fb81bb631 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id-unsupported-calling-convention.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id-unsupported-calling-convention.ll
@@ -1,55 +1,24 @@
-; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=amdgcn -mcpu=gfx942 -O0 -stop-after=amdgpu-isel -o - %s | FileCheck --check-prefix=SelDAG %s
-; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx942 -stop-after=legalizer -o - %s | FileCheck --check-prefix=GlobalISel %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=amdgcn -mcpu=gfx942 -o - %s | FileCheck --check-prefix=SELDAG %s
+; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx942 -o - %s | FileCheck --check-prefix=GLOBALISEL %s
 
 declare i32 @llvm.amdgcn.workitem.id.x()
 declare i32 @llvm.amdgcn.workitem.id.y()
 declare i32 @llvm.amdgcn.workitem.id.z()
 
-define amdgpu_ps void @undefined_workitems(ptr %p, ptr %q, ptr %r) {
-  ; SelDAG-LABEL: name: undefined_workitems
-  ; SelDAG: bb.0 (%ir-block.0):
-  ; SelDAG-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
-  ; SelDAG-NEXT: {{  $}}
-  ; SelDAG-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr5
-  ; SelDAG-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr4
-  ; SelDAG-NEXT:   [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr3
-  ; SelDAG-NEXT:   [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr2
-  ; SelDAG-NEXT:   [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr1
-  ; SelDAG-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr0
-  ; SelDAG-NEXT:   [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY]], %subreg.sub1
-  ; SelDAG-NEXT:   [[REG_SEQUENCE1:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY3]], %subreg.sub0, [[COPY2]], %subreg.sub1
-  ; SelDAG-NEXT:   [[REG_SEQUENCE2:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY5]], %subreg.sub0, [[COPY4]], %subreg.sub1
-  ; SelDAG-NEXT:   [[COPY6:%[0-9]+]]:vreg_64_align2 = COPY [[REG_SEQUENCE]]
-  ; SelDAG-NEXT:   [[COPY7:%[0-9]+]]:vreg_64_align2 = COPY [[REG_SEQUENCE1]]
-  ; SelDAG-NEXT:   [[COPY8:%[0-9]+]]:vreg_64_align2 = COPY [[REG_SEQUENCE2]]
-  ; SelDAG-NEXT:   S_ENDPGM 0
-  ;
-  ; GlobalISel-LABEL: name: undefined_workitems
-  ; GlobalISel: bb.1 (%ir-block.0):
-  ; GlobalISel-NEXT:   liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
-  ; GlobalISel-NEXT: {{  $}}
-  ; GlobalISel-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
-  ; GlobalISel-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
-  ; GlobalISel-NEXT:   [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
-  ; GlobalISel-NEXT:   [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
-  ; GlobalISel-NEXT:   [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
-  ; GlobalISel-NEXT:   [[MV1:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
-  ; GlobalISel-NEXT:   [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
-  ; GlobalISel-NEXT:   [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
-  ; GlobalISel-NEXT:   [[MV2:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY4]](s32), [[COPY5]](s32)
-  ; GlobalISel-NEXT:   [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
-  ; GlobalISel-NEXT:   [[COPY6:%[0-9]+]]:_(s32) = COPY [[DEF]](s32)
-  ; GlobalISel-NEXT:   G_STORE [[COPY6]](s32), [[MV]](p0) :: (store (s32) into %ir.p)
-  ; GlobalISel-NEXT:   [[COPY7:%[0-9]+]]:_(s32) = COPY [[DEF]](s32)
-  ; GlobalISel-NEXT:   G_STORE [[COPY7]](s32), [[MV1]](p0) :: (store (s32) into %ir.q)
-  ; GlobalISel-NEXT:   G_STORE [[DEF]](s32), [[MV2]](p0) :: (store (s32) into %ir.r)
-  ; GlobalISel-NEXT:   S_ENDPGM 0
+define amdgpu_ps void @undefined_workitems(ptr addrspace(1) %p, ptr addrspace(1) %q, ptr addrspace(1) %r) {
+; SELDAG-LABEL: undefined_workitems:
+; SELDAG:       ; %bb.0:
+; SELDAG-NEXT:    s_endpgm
+;
+; GLOBALISEL-LABEL: undefined_workitems:
+; GLOBALISEL:       ; %bb.0:
+; GLOBALISEL-NEXT:    s_endpgm
   %id.x = call i32 @llvm.amdgcn.workitem.id.x()
-  store i32 %id.x, ptr %p
+  store i32 %id.x, ptr addrspace(1) %p
   %id.y = call i32 @llvm.amdgcn.workitem.id.y()
-  store i32 %id.y, ptr %q
+  store i32 %id.y, ptr addrspace(1) %q
   %id.z = call i32 @llvm.amdgcn.workitem.id.z()
-  store i32 %id.z, ptr %r
+  store i32 %id.z, ptr addrspace(1) %r
   ret void
 }

[arsenm]

Use explicit -global-isel=0 for the dag run line. Should also use a common prefix, they both have the same output