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merged 3 commits into from
Mar 4, 2025
Merged

[CodeGen][NPM] Port ExpandPostRAPseudos to NPM #129509

merged 3 commits into from
Mar 4, 2025

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@optimisan optimisan mentioned this pull request Mar 3, 2025
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@optimisan optimisan force-pushed the users/optimisan/03-03-_codegen_npm_port_expandpostrapseudos_to_npm branch from 1ded3ed to f3a724f Compare March 3, 2025 11:05
@optimisan optimisan marked this pull request as ready for review March 3, 2025 11:07
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llvmbot commented Mar 3, 2025

@llvm/pr-subscribers-backend-aarch64

Author: Akshat Oke (optimisan)

Changes

Full diff: https://github.com/llvm/llvm-project/pull/129509.diff

11 Files Affected:

  • (added) llvm/include/llvm/CodeGen/ExpandPostRAPseudos.h (+24)
  • (modified) llvm/include/llvm/InitializePasses.h (+1-1)
  • (modified) llvm/include/llvm/Passes/CodeGenPassBuilder.h (+1)
  • (modified) llvm/include/llvm/Passes/MachinePassRegistry.def (+1-1)
  • (modified) llvm/lib/CodeGen/CodeGen.cpp (+1-1)
  • (modified) llvm/lib/CodeGen/ExpandPostRAPseudos.cpp (+37-12)
  • (modified) llvm/lib/Passes/PassBuilder.cpp (+1)
  • (modified) llvm/test/CodeGen/AArch64/seqpaircopy.mir (+1)
  • (modified) llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir (+2)
  • (modified) llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir (+1)
  • (modified) llvm/test/CodeGen/SystemZ/copy-phys-reg-gr64-to-fp64.mir (+1)
diff --git a/llvm/include/llvm/CodeGen/ExpandPostRAPseudos.h b/llvm/include/llvm/CodeGen/ExpandPostRAPseudos.h
new file mode 100644
index 0000000000000..dbdb473a0788f
--- /dev/null
+++ b/llvm/include/llvm/CodeGen/ExpandPostRAPseudos.h
@@ -0,0 +1,24 @@
+//===- llvm/CodeGen/ExpandPostRAPseudos.h --------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_EXPANDPOSTRAPSEUDOS_H
+#define LLVM_CODEGEN_EXPANDPOSTRAPSEUDOS_H
+
+#include "llvm/CodeGen/MachinePassManager.h"
+
+namespace llvm {
+
+class ExpandPostRAPseudosPass : public PassInfoMixin<ExpandPostRAPseudosPass> {
+public:
+  PreservedAnalyses run(MachineFunction &MF,
+                        MachineFunctionAnalysisManager &MFAM);
+};
+
+} // namespace llvm
+
+#endif // LLVM_CODEGEN_EXPANDPOSTRAPSEUDOS_H
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
index 0850405bb101d..bf23b9c601b88 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -108,7 +108,7 @@ void initializeEHContGuardCatchretPass(PassRegistry &);
 void initializeExpandLargeFpConvertLegacyPassPass(PassRegistry &);
 void initializeExpandLargeDivRemLegacyPassPass(PassRegistry &);
 void initializeExpandMemCmpLegacyPassPass(PassRegistry &);
-void initializeExpandPostRAPass(PassRegistry &);
+void initializeExpandPostRALegacyPass(PassRegistry &);
 void initializeExpandReductionsPass(PassRegistry &);
 void initializeExpandVariadicsPass(PassRegistry &);
 void initializeExternalAAWrapperPassPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index bab034293a6d0..caece18161a31 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -31,6 +31,7 @@
 #include "llvm/CodeGen/ExpandLargeDivRem.h"
 #include "llvm/CodeGen/ExpandLargeFpConvert.h"
 #include "llvm/CodeGen/ExpandMemCmp.h"
+#include "llvm/CodeGen/ExpandPostRAPseudos.h"
 #include "llvm/CodeGen/ExpandReductions.h"
 #include "llvm/CodeGen/FinalizeISel.h"
 #include "llvm/CodeGen/GCMetadata.h"
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 92826ac8db2c5..12deeea413296 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -154,6 +154,7 @@ MACHINE_FUNCTION_PASS("peephole-opt", PeepholeOptimizerPass())
 MACHINE_FUNCTION_PASS("phi-node-elimination", PHIEliminationPass())
 MACHINE_FUNCTION_PASS("post-RA-sched", PostRASchedulerPass(TM))
 MACHINE_FUNCTION_PASS("postmisched", PostMachineSchedulerPass(TM))
+MACHINE_FUNCTION_PASS("post-ra-pseudos", ExpandPostRAPseudosPass())
 MACHINE_FUNCTION_PASS("print", PrintMIRPass())
 MACHINE_FUNCTION_PASS("print<livedebugvars>", LiveDebugVariablesPrinterPass(errs()))
 MACHINE_FUNCTION_PASS("print<live-intervals>", LiveIntervalsPrinterPass(errs()))
@@ -264,7 +265,6 @@ DUMMY_MACHINE_FUNCTION_PASS("machineinstr-printer", MachineFunctionPrinterPass)
 DUMMY_MACHINE_FUNCTION_PASS("mirfs-discriminators", MIRAddFSDiscriminatorsPass)
 DUMMY_MACHINE_FUNCTION_PASS("patchable-function", PatchableFunctionPass)
 DUMMY_MACHINE_FUNCTION_PASS("postra-machine-sink", PostRAMachineSinkingPass)
-DUMMY_MACHINE_FUNCTION_PASS("postrapseudos", ExpandPostRAPseudosPass)
 DUMMY_MACHINE_FUNCTION_PASS("print-machine-uniformity", MachineUniformityInfoPrinterPass)
 DUMMY_MACHINE_FUNCTION_PASS("processimpdefs", ProcessImplicitDefsPass)
 DUMMY_MACHINE_FUNCTION_PASS("prologepilog", PrologEpilogInserterPass)
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index 96db2dc94d5b8..b9cd3afae0970 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -42,7 +42,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
   initializeExpandLargeDivRemLegacyPassPass(Registry);
   initializeExpandLargeFpConvertLegacyPassPass(Registry);
   initializeExpandMemCmpLegacyPassPass(Registry);
-  initializeExpandPostRAPass(Registry);
+  initializeExpandPostRALegacyPass(Registry);
   initializeFEntryInserterPass(Registry);
   initializeFinalizeISelPass(Registry);
   initializeFinalizeMachineBundlesPass(Registry);
diff --git a/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp b/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
index 3a79f20f47322..96d27696501ac 100644
--- a/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
+++ b/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
@@ -11,8 +11,11 @@
 //
 //===----------------------------------------------------------------------===//
 
+#include "llvm/CodeGen/ExpandPostRAPseudos.h"
+#include "llvm/CodeGen/MachineDominators.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineLoopInfo.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/TargetInstrInfo.h"
 #include "llvm/CodeGen/TargetRegisterInfo.h"
@@ -26,14 +29,22 @@ using namespace llvm;
 #define DEBUG_TYPE "postrapseudos"
 
 namespace {
-struct ExpandPostRA : public MachineFunctionPass {
+struct ExpandPostRA {
+
+  bool run(MachineFunction &);
+
 private:
   const TargetRegisterInfo *TRI = nullptr;
   const TargetInstrInfo *TII = nullptr;
 
-public:
-  static char ID; // Pass identification, replacement for typeid
-  ExpandPostRA() : MachineFunctionPass(ID) {}
+  bool LowerSubregToReg(MachineInstr *MI);
+};
+
+struct ExpandPostRALegacy : public MachineFunctionPass {
+  static char ID;
+  ExpandPostRALegacy() : MachineFunctionPass(ID) {
+    initializeExpandPostRALegacyPass(*PassRegistry::getPassRegistry());
+  }
 
   void getAnalysisUsage(AnalysisUsage &AU) const override {
     AU.setPreservesCFG();
@@ -43,17 +54,27 @@ struct ExpandPostRA : public MachineFunctionPass {
   }
 
   /// runOnMachineFunction - pass entry point
-  bool runOnMachineFunction(MachineFunction&) override;
-
-private:
-  bool LowerSubregToReg(MachineInstr *MI);
+  bool runOnMachineFunction(MachineFunction &) override;
 };
 } // end anonymous namespace
 
-char ExpandPostRA::ID = 0;
-char &llvm::ExpandPostRAPseudosID = ExpandPostRA::ID;
+PreservedAnalyses
+ExpandPostRAPseudosPass::run(MachineFunction &MF,
+                             MachineFunctionAnalysisManager &MFAM) {
+  if (!ExpandPostRA().run(MF))
+    return PreservedAnalyses::all();
+
+  auto PA = getMachineFunctionPassPreservedAnalyses();
+  PA.preserveSet<CFGAnalyses>();
+  PA.preserve<MachineLoopAnalysis>();
+  PA.preserve<MachineDominatorTreeAnalysis>();
+  return PA;
+}
+
+char ExpandPostRALegacy::ID = 0;
+char &llvm::ExpandPostRAPseudosID = ExpandPostRALegacy::ID;
 
-INITIALIZE_PASS(ExpandPostRA, DEBUG_TYPE,
+INITIALIZE_PASS(ExpandPostRALegacy, DEBUG_TYPE,
                 "Post-RA pseudo instruction expansion pass", false, false)
 
 bool ExpandPostRA::LowerSubregToReg(MachineInstr *MI) {
@@ -115,10 +136,14 @@ bool ExpandPostRA::LowerSubregToReg(MachineInstr *MI) {
   return true;
 }
 
+bool ExpandPostRALegacy::runOnMachineFunction(MachineFunction &MF) {
+  return ExpandPostRA().run(MF);
+}
+
 /// runOnMachineFunction - Reduce subregister inserts and extracts to register
 /// copies.
 ///
-bool ExpandPostRA::runOnMachineFunction(MachineFunction &MF) {
+bool ExpandPostRA::run(MachineFunction &MF) {
   LLVM_DEBUG(dbgs() << "Machine Function\n"
                     << "********** EXPANDING POST-RA PSEUDO INSTRS **********\n"
                     << "********** Function: " << MF.getName() << '\n');
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index a0fb2bcfbce14..f78c626f95685 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -90,6 +90,7 @@
 #include "llvm/CodeGen/ExpandLargeDivRem.h"
 #include "llvm/CodeGen/ExpandLargeFpConvert.h"
 #include "llvm/CodeGen/ExpandMemCmp.h"
+#include "llvm/CodeGen/ExpandPostRAPseudos.h"
 #include "llvm/CodeGen/FinalizeISel.h"
 #include "llvm/CodeGen/GCMetadata.h"
 #include "llvm/CodeGen/GlobalMerge.h"
diff --git a/llvm/test/CodeGen/AArch64/seqpaircopy.mir b/llvm/test/CodeGen/AArch64/seqpaircopy.mir
index 89511cbf726bd..a3c47232435fa 100644
--- a/llvm/test/CodeGen/AArch64/seqpaircopy.mir
+++ b/llvm/test/CodeGen/AArch64/seqpaircopy.mir
@@ -1,4 +1,5 @@
 # RUN: llc -o - %s -mtriple=aarch64-- -mattr=+v8.1a -run-pass=postrapseudos | FileCheck %s
+# RUN: llc -o - %s -mtriple=aarch64-- -mattr=+v8.1a -passes=post-ra-pseudos | FileCheck %s
 ---
 # CHECK-LABEL: name: copy_xseqpairs
 name: copy_xseqpairs
diff --git a/llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir b/llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
index 94fde7c4733a3..2bd1b8bf3f3f6 100644
--- a/llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
+++ b/llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
@@ -3,6 +3,8 @@
 # RUN: llc -mtriple=amdgcn -mcpu=gfx90a -run-pass postrapseudos -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX90A %s
 # RUN: llc -mtriple=amdgcn -mcpu=gfx942 -run-pass postrapseudos -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX942 %s
 
+# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -passes=post-ra-pseudos -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX942 %s
+
 --- |
     define amdgpu_kernel void @a_to_v() #0 { ret void }
     define amdgpu_kernel void @a2_to_v2() #0 { ret void }
diff --git a/llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir b/llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
index fad2b1b325a48..8a489bd7598b4 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
@@ -1,5 +1,6 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -verify-machineinstrs -mtriple riscv64 -run-pass=postrapseudos %s -o - | FileCheck %s
+# RUN: llc -verify-machineinstrs -mtriple riscv64 -passes=post-ra-pseudos %s -o - | FileCheck %s
 
 ...
 ---
diff --git a/llvm/test/CodeGen/SystemZ/copy-phys-reg-gr64-to-fp64.mir b/llvm/test/CodeGen/SystemZ/copy-phys-reg-gr64-to-fp64.mir
index 07ef93415bb79..d7310ef6b98d3 100644
--- a/llvm/test/CodeGen/SystemZ/copy-phys-reg-gr64-to-fp64.mir
+++ b/llvm/test/CodeGen/SystemZ/copy-phys-reg-gr64-to-fp64.mir
@@ -1,5 +1,6 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
 # RUN: llc -mtriple=s390x-ibm-linux -mcpu=z13 -run-pass=postrapseudos -o - %s | FileCheck %s
+# RUN: llc -mtriple=s390x-ibm-linux -mcpu=z13 -passes=post-ra-pseudos -o - %s | FileCheck %s
 ---
 name:            copy_fp64_to_gr64__f3d_to_r1d
 tracksRegLiveness: true

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llvmbot commented Mar 3, 2025

@llvm/pr-subscribers-backend-systemz

Author: Akshat Oke (optimisan)

Changes

Full diff: https://github.com/llvm/llvm-project/pull/129509.diff

11 Files Affected:

  • (added) llvm/include/llvm/CodeGen/ExpandPostRAPseudos.h (+24)
  • (modified) llvm/include/llvm/InitializePasses.h (+1-1)
  • (modified) llvm/include/llvm/Passes/CodeGenPassBuilder.h (+1)
  • (modified) llvm/include/llvm/Passes/MachinePassRegistry.def (+1-1)
  • (modified) llvm/lib/CodeGen/CodeGen.cpp (+1-1)
  • (modified) llvm/lib/CodeGen/ExpandPostRAPseudos.cpp (+37-12)
  • (modified) llvm/lib/Passes/PassBuilder.cpp (+1)
  • (modified) llvm/test/CodeGen/AArch64/seqpaircopy.mir (+1)
  • (modified) llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir (+2)
  • (modified) llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir (+1)
  • (modified) llvm/test/CodeGen/SystemZ/copy-phys-reg-gr64-to-fp64.mir (+1)
diff --git a/llvm/include/llvm/CodeGen/ExpandPostRAPseudos.h b/llvm/include/llvm/CodeGen/ExpandPostRAPseudos.h
new file mode 100644
index 0000000000000..dbdb473a0788f
--- /dev/null
+++ b/llvm/include/llvm/CodeGen/ExpandPostRAPseudos.h
@@ -0,0 +1,24 @@
+//===- llvm/CodeGen/ExpandPostRAPseudos.h --------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_EXPANDPOSTRAPSEUDOS_H
+#define LLVM_CODEGEN_EXPANDPOSTRAPSEUDOS_H
+
+#include "llvm/CodeGen/MachinePassManager.h"
+
+namespace llvm {
+
+class ExpandPostRAPseudosPass : public PassInfoMixin<ExpandPostRAPseudosPass> {
+public:
+  PreservedAnalyses run(MachineFunction &MF,
+                        MachineFunctionAnalysisManager &MFAM);
+};
+
+} // namespace llvm
+
+#endif // LLVM_CODEGEN_EXPANDPOSTRAPSEUDOS_H
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
index 0850405bb101d..bf23b9c601b88 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -108,7 +108,7 @@ void initializeEHContGuardCatchretPass(PassRegistry &);
 void initializeExpandLargeFpConvertLegacyPassPass(PassRegistry &);
 void initializeExpandLargeDivRemLegacyPassPass(PassRegistry &);
 void initializeExpandMemCmpLegacyPassPass(PassRegistry &);
-void initializeExpandPostRAPass(PassRegistry &);
+void initializeExpandPostRALegacyPass(PassRegistry &);
 void initializeExpandReductionsPass(PassRegistry &);
 void initializeExpandVariadicsPass(PassRegistry &);
 void initializeExternalAAWrapperPassPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index bab034293a6d0..caece18161a31 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -31,6 +31,7 @@
 #include "llvm/CodeGen/ExpandLargeDivRem.h"
 #include "llvm/CodeGen/ExpandLargeFpConvert.h"
 #include "llvm/CodeGen/ExpandMemCmp.h"
+#include "llvm/CodeGen/ExpandPostRAPseudos.h"
 #include "llvm/CodeGen/ExpandReductions.h"
 #include "llvm/CodeGen/FinalizeISel.h"
 #include "llvm/CodeGen/GCMetadata.h"
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 92826ac8db2c5..12deeea413296 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -154,6 +154,7 @@ MACHINE_FUNCTION_PASS("peephole-opt", PeepholeOptimizerPass())
 MACHINE_FUNCTION_PASS("phi-node-elimination", PHIEliminationPass())
 MACHINE_FUNCTION_PASS("post-RA-sched", PostRASchedulerPass(TM))
 MACHINE_FUNCTION_PASS("postmisched", PostMachineSchedulerPass(TM))
+MACHINE_FUNCTION_PASS("post-ra-pseudos", ExpandPostRAPseudosPass())
 MACHINE_FUNCTION_PASS("print", PrintMIRPass())
 MACHINE_FUNCTION_PASS("print<livedebugvars>", LiveDebugVariablesPrinterPass(errs()))
 MACHINE_FUNCTION_PASS("print<live-intervals>", LiveIntervalsPrinterPass(errs()))
@@ -264,7 +265,6 @@ DUMMY_MACHINE_FUNCTION_PASS("machineinstr-printer", MachineFunctionPrinterPass)
 DUMMY_MACHINE_FUNCTION_PASS("mirfs-discriminators", MIRAddFSDiscriminatorsPass)
 DUMMY_MACHINE_FUNCTION_PASS("patchable-function", PatchableFunctionPass)
 DUMMY_MACHINE_FUNCTION_PASS("postra-machine-sink", PostRAMachineSinkingPass)
-DUMMY_MACHINE_FUNCTION_PASS("postrapseudos", ExpandPostRAPseudosPass)
 DUMMY_MACHINE_FUNCTION_PASS("print-machine-uniformity", MachineUniformityInfoPrinterPass)
 DUMMY_MACHINE_FUNCTION_PASS("processimpdefs", ProcessImplicitDefsPass)
 DUMMY_MACHINE_FUNCTION_PASS("prologepilog", PrologEpilogInserterPass)
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index 96db2dc94d5b8..b9cd3afae0970 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -42,7 +42,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
   initializeExpandLargeDivRemLegacyPassPass(Registry);
   initializeExpandLargeFpConvertLegacyPassPass(Registry);
   initializeExpandMemCmpLegacyPassPass(Registry);
-  initializeExpandPostRAPass(Registry);
+  initializeExpandPostRALegacyPass(Registry);
   initializeFEntryInserterPass(Registry);
   initializeFinalizeISelPass(Registry);
   initializeFinalizeMachineBundlesPass(Registry);
diff --git a/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp b/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
index 3a79f20f47322..96d27696501ac 100644
--- a/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
+++ b/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
@@ -11,8 +11,11 @@
 //
 //===----------------------------------------------------------------------===//
 
+#include "llvm/CodeGen/ExpandPostRAPseudos.h"
+#include "llvm/CodeGen/MachineDominators.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineLoopInfo.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/TargetInstrInfo.h"
 #include "llvm/CodeGen/TargetRegisterInfo.h"
@@ -26,14 +29,22 @@ using namespace llvm;
 #define DEBUG_TYPE "postrapseudos"
 
 namespace {
-struct ExpandPostRA : public MachineFunctionPass {
+struct ExpandPostRA {
+
+  bool run(MachineFunction &);
+
 private:
   const TargetRegisterInfo *TRI = nullptr;
   const TargetInstrInfo *TII = nullptr;
 
-public:
-  static char ID; // Pass identification, replacement for typeid
-  ExpandPostRA() : MachineFunctionPass(ID) {}
+  bool LowerSubregToReg(MachineInstr *MI);
+};
+
+struct ExpandPostRALegacy : public MachineFunctionPass {
+  static char ID;
+  ExpandPostRALegacy() : MachineFunctionPass(ID) {
+    initializeExpandPostRALegacyPass(*PassRegistry::getPassRegistry());
+  }
 
   void getAnalysisUsage(AnalysisUsage &AU) const override {
     AU.setPreservesCFG();
@@ -43,17 +54,27 @@ struct ExpandPostRA : public MachineFunctionPass {
   }
 
   /// runOnMachineFunction - pass entry point
-  bool runOnMachineFunction(MachineFunction&) override;
-
-private:
-  bool LowerSubregToReg(MachineInstr *MI);
+  bool runOnMachineFunction(MachineFunction &) override;
 };
 } // end anonymous namespace
 
-char ExpandPostRA::ID = 0;
-char &llvm::ExpandPostRAPseudosID = ExpandPostRA::ID;
+PreservedAnalyses
+ExpandPostRAPseudosPass::run(MachineFunction &MF,
+                             MachineFunctionAnalysisManager &MFAM) {
+  if (!ExpandPostRA().run(MF))
+    return PreservedAnalyses::all();
+
+  auto PA = getMachineFunctionPassPreservedAnalyses();
+  PA.preserveSet<CFGAnalyses>();
+  PA.preserve<MachineLoopAnalysis>();
+  PA.preserve<MachineDominatorTreeAnalysis>();
+  return PA;
+}
+
+char ExpandPostRALegacy::ID = 0;
+char &llvm::ExpandPostRAPseudosID = ExpandPostRALegacy::ID;
 
-INITIALIZE_PASS(ExpandPostRA, DEBUG_TYPE,
+INITIALIZE_PASS(ExpandPostRALegacy, DEBUG_TYPE,
                 "Post-RA pseudo instruction expansion pass", false, false)
 
 bool ExpandPostRA::LowerSubregToReg(MachineInstr *MI) {
@@ -115,10 +136,14 @@ bool ExpandPostRA::LowerSubregToReg(MachineInstr *MI) {
   return true;
 }
 
+bool ExpandPostRALegacy::runOnMachineFunction(MachineFunction &MF) {
+  return ExpandPostRA().run(MF);
+}
+
 /// runOnMachineFunction - Reduce subregister inserts and extracts to register
 /// copies.
 ///
-bool ExpandPostRA::runOnMachineFunction(MachineFunction &MF) {
+bool ExpandPostRA::run(MachineFunction &MF) {
   LLVM_DEBUG(dbgs() << "Machine Function\n"
                     << "********** EXPANDING POST-RA PSEUDO INSTRS **********\n"
                     << "********** Function: " << MF.getName() << '\n');
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index a0fb2bcfbce14..f78c626f95685 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -90,6 +90,7 @@
 #include "llvm/CodeGen/ExpandLargeDivRem.h"
 #include "llvm/CodeGen/ExpandLargeFpConvert.h"
 #include "llvm/CodeGen/ExpandMemCmp.h"
+#include "llvm/CodeGen/ExpandPostRAPseudos.h"
 #include "llvm/CodeGen/FinalizeISel.h"
 #include "llvm/CodeGen/GCMetadata.h"
 #include "llvm/CodeGen/GlobalMerge.h"
diff --git a/llvm/test/CodeGen/AArch64/seqpaircopy.mir b/llvm/test/CodeGen/AArch64/seqpaircopy.mir
index 89511cbf726bd..a3c47232435fa 100644
--- a/llvm/test/CodeGen/AArch64/seqpaircopy.mir
+++ b/llvm/test/CodeGen/AArch64/seqpaircopy.mir
@@ -1,4 +1,5 @@
 # RUN: llc -o - %s -mtriple=aarch64-- -mattr=+v8.1a -run-pass=postrapseudos | FileCheck %s
+# RUN: llc -o - %s -mtriple=aarch64-- -mattr=+v8.1a -passes=post-ra-pseudos | FileCheck %s
 ---
 # CHECK-LABEL: name: copy_xseqpairs
 name: copy_xseqpairs
diff --git a/llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir b/llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
index 94fde7c4733a3..2bd1b8bf3f3f6 100644
--- a/llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
+++ b/llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
@@ -3,6 +3,8 @@
 # RUN: llc -mtriple=amdgcn -mcpu=gfx90a -run-pass postrapseudos -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX90A %s
 # RUN: llc -mtriple=amdgcn -mcpu=gfx942 -run-pass postrapseudos -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX942 %s
 
+# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -passes=post-ra-pseudos -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX942 %s
+
 --- |
     define amdgpu_kernel void @a_to_v() #0 { ret void }
     define amdgpu_kernel void @a2_to_v2() #0 { ret void }
diff --git a/llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir b/llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
index fad2b1b325a48..8a489bd7598b4 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
@@ -1,5 +1,6 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -verify-machineinstrs -mtriple riscv64 -run-pass=postrapseudos %s -o - | FileCheck %s
+# RUN: llc -verify-machineinstrs -mtriple riscv64 -passes=post-ra-pseudos %s -o - | FileCheck %s
 
 ...
 ---
diff --git a/llvm/test/CodeGen/SystemZ/copy-phys-reg-gr64-to-fp64.mir b/llvm/test/CodeGen/SystemZ/copy-phys-reg-gr64-to-fp64.mir
index 07ef93415bb79..d7310ef6b98d3 100644
--- a/llvm/test/CodeGen/SystemZ/copy-phys-reg-gr64-to-fp64.mir
+++ b/llvm/test/CodeGen/SystemZ/copy-phys-reg-gr64-to-fp64.mir
@@ -1,5 +1,6 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
 # RUN: llc -mtriple=s390x-ibm-linux -mcpu=z13 -run-pass=postrapseudos -o - %s | FileCheck %s
+# RUN: llc -mtriple=s390x-ibm-linux -mcpu=z13 -passes=post-ra-pseudos -o - %s | FileCheck %s
 ---
 name:            copy_fp64_to_gr64__f3d_to_r1d
 tracksRegLiveness: true

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llvmbot commented Mar 3, 2025

@llvm/pr-subscribers-backend-amdgpu

Author: Akshat Oke (optimisan)

Changes

Full diff: https://github.com/llvm/llvm-project/pull/129509.diff

11 Files Affected:

  • (added) llvm/include/llvm/CodeGen/ExpandPostRAPseudos.h (+24)
  • (modified) llvm/include/llvm/InitializePasses.h (+1-1)
  • (modified) llvm/include/llvm/Passes/CodeGenPassBuilder.h (+1)
  • (modified) llvm/include/llvm/Passes/MachinePassRegistry.def (+1-1)
  • (modified) llvm/lib/CodeGen/CodeGen.cpp (+1-1)
  • (modified) llvm/lib/CodeGen/ExpandPostRAPseudos.cpp (+37-12)
  • (modified) llvm/lib/Passes/PassBuilder.cpp (+1)
  • (modified) llvm/test/CodeGen/AArch64/seqpaircopy.mir (+1)
  • (modified) llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir (+2)
  • (modified) llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir (+1)
  • (modified) llvm/test/CodeGen/SystemZ/copy-phys-reg-gr64-to-fp64.mir (+1)
diff --git a/llvm/include/llvm/CodeGen/ExpandPostRAPseudos.h b/llvm/include/llvm/CodeGen/ExpandPostRAPseudos.h
new file mode 100644
index 0000000000000..dbdb473a0788f
--- /dev/null
+++ b/llvm/include/llvm/CodeGen/ExpandPostRAPseudos.h
@@ -0,0 +1,24 @@
+//===- llvm/CodeGen/ExpandPostRAPseudos.h --------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_EXPANDPOSTRAPSEUDOS_H
+#define LLVM_CODEGEN_EXPANDPOSTRAPSEUDOS_H
+
+#include "llvm/CodeGen/MachinePassManager.h"
+
+namespace llvm {
+
+class ExpandPostRAPseudosPass : public PassInfoMixin<ExpandPostRAPseudosPass> {
+public:
+  PreservedAnalyses run(MachineFunction &MF,
+                        MachineFunctionAnalysisManager &MFAM);
+};
+
+} // namespace llvm
+
+#endif // LLVM_CODEGEN_EXPANDPOSTRAPSEUDOS_H
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
index 0850405bb101d..bf23b9c601b88 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -108,7 +108,7 @@ void initializeEHContGuardCatchretPass(PassRegistry &);
 void initializeExpandLargeFpConvertLegacyPassPass(PassRegistry &);
 void initializeExpandLargeDivRemLegacyPassPass(PassRegistry &);
 void initializeExpandMemCmpLegacyPassPass(PassRegistry &);
-void initializeExpandPostRAPass(PassRegistry &);
+void initializeExpandPostRALegacyPass(PassRegistry &);
 void initializeExpandReductionsPass(PassRegistry &);
 void initializeExpandVariadicsPass(PassRegistry &);
 void initializeExternalAAWrapperPassPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index bab034293a6d0..caece18161a31 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -31,6 +31,7 @@
 #include "llvm/CodeGen/ExpandLargeDivRem.h"
 #include "llvm/CodeGen/ExpandLargeFpConvert.h"
 #include "llvm/CodeGen/ExpandMemCmp.h"
+#include "llvm/CodeGen/ExpandPostRAPseudos.h"
 #include "llvm/CodeGen/ExpandReductions.h"
 #include "llvm/CodeGen/FinalizeISel.h"
 #include "llvm/CodeGen/GCMetadata.h"
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 92826ac8db2c5..12deeea413296 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -154,6 +154,7 @@ MACHINE_FUNCTION_PASS("peephole-opt", PeepholeOptimizerPass())
 MACHINE_FUNCTION_PASS("phi-node-elimination", PHIEliminationPass())
 MACHINE_FUNCTION_PASS("post-RA-sched", PostRASchedulerPass(TM))
 MACHINE_FUNCTION_PASS("postmisched", PostMachineSchedulerPass(TM))
+MACHINE_FUNCTION_PASS("post-ra-pseudos", ExpandPostRAPseudosPass())
 MACHINE_FUNCTION_PASS("print", PrintMIRPass())
 MACHINE_FUNCTION_PASS("print<livedebugvars>", LiveDebugVariablesPrinterPass(errs()))
 MACHINE_FUNCTION_PASS("print<live-intervals>", LiveIntervalsPrinterPass(errs()))
@@ -264,7 +265,6 @@ DUMMY_MACHINE_FUNCTION_PASS("machineinstr-printer", MachineFunctionPrinterPass)
 DUMMY_MACHINE_FUNCTION_PASS("mirfs-discriminators", MIRAddFSDiscriminatorsPass)
 DUMMY_MACHINE_FUNCTION_PASS("patchable-function", PatchableFunctionPass)
 DUMMY_MACHINE_FUNCTION_PASS("postra-machine-sink", PostRAMachineSinkingPass)
-DUMMY_MACHINE_FUNCTION_PASS("postrapseudos", ExpandPostRAPseudosPass)
 DUMMY_MACHINE_FUNCTION_PASS("print-machine-uniformity", MachineUniformityInfoPrinterPass)
 DUMMY_MACHINE_FUNCTION_PASS("processimpdefs", ProcessImplicitDefsPass)
 DUMMY_MACHINE_FUNCTION_PASS("prologepilog", PrologEpilogInserterPass)
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index 96db2dc94d5b8..b9cd3afae0970 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -42,7 +42,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
   initializeExpandLargeDivRemLegacyPassPass(Registry);
   initializeExpandLargeFpConvertLegacyPassPass(Registry);
   initializeExpandMemCmpLegacyPassPass(Registry);
-  initializeExpandPostRAPass(Registry);
+  initializeExpandPostRALegacyPass(Registry);
   initializeFEntryInserterPass(Registry);
   initializeFinalizeISelPass(Registry);
   initializeFinalizeMachineBundlesPass(Registry);
diff --git a/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp b/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
index 3a79f20f47322..96d27696501ac 100644
--- a/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
+++ b/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
@@ -11,8 +11,11 @@
 //
 //===----------------------------------------------------------------------===//
 
+#include "llvm/CodeGen/ExpandPostRAPseudos.h"
+#include "llvm/CodeGen/MachineDominators.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineLoopInfo.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/TargetInstrInfo.h"
 #include "llvm/CodeGen/TargetRegisterInfo.h"
@@ -26,14 +29,22 @@ using namespace llvm;
 #define DEBUG_TYPE "postrapseudos"
 
 namespace {
-struct ExpandPostRA : public MachineFunctionPass {
+struct ExpandPostRA {
+
+  bool run(MachineFunction &);
+
 private:
   const TargetRegisterInfo *TRI = nullptr;
   const TargetInstrInfo *TII = nullptr;
 
-public:
-  static char ID; // Pass identification, replacement for typeid
-  ExpandPostRA() : MachineFunctionPass(ID) {}
+  bool LowerSubregToReg(MachineInstr *MI);
+};
+
+struct ExpandPostRALegacy : public MachineFunctionPass {
+  static char ID;
+  ExpandPostRALegacy() : MachineFunctionPass(ID) {
+    initializeExpandPostRALegacyPass(*PassRegistry::getPassRegistry());
+  }
 
   void getAnalysisUsage(AnalysisUsage &AU) const override {
     AU.setPreservesCFG();
@@ -43,17 +54,27 @@ struct ExpandPostRA : public MachineFunctionPass {
   }
 
   /// runOnMachineFunction - pass entry point
-  bool runOnMachineFunction(MachineFunction&) override;
-
-private:
-  bool LowerSubregToReg(MachineInstr *MI);
+  bool runOnMachineFunction(MachineFunction &) override;
 };
 } // end anonymous namespace
 
-char ExpandPostRA::ID = 0;
-char &llvm::ExpandPostRAPseudosID = ExpandPostRA::ID;
+PreservedAnalyses
+ExpandPostRAPseudosPass::run(MachineFunction &MF,
+                             MachineFunctionAnalysisManager &MFAM) {
+  if (!ExpandPostRA().run(MF))
+    return PreservedAnalyses::all();
+
+  auto PA = getMachineFunctionPassPreservedAnalyses();
+  PA.preserveSet<CFGAnalyses>();
+  PA.preserve<MachineLoopAnalysis>();
+  PA.preserve<MachineDominatorTreeAnalysis>();
+  return PA;
+}
+
+char ExpandPostRALegacy::ID = 0;
+char &llvm::ExpandPostRAPseudosID = ExpandPostRALegacy::ID;
 
-INITIALIZE_PASS(ExpandPostRA, DEBUG_TYPE,
+INITIALIZE_PASS(ExpandPostRALegacy, DEBUG_TYPE,
                 "Post-RA pseudo instruction expansion pass", false, false)
 
 bool ExpandPostRA::LowerSubregToReg(MachineInstr *MI) {
@@ -115,10 +136,14 @@ bool ExpandPostRA::LowerSubregToReg(MachineInstr *MI) {
   return true;
 }
 
+bool ExpandPostRALegacy::runOnMachineFunction(MachineFunction &MF) {
+  return ExpandPostRA().run(MF);
+}
+
 /// runOnMachineFunction - Reduce subregister inserts and extracts to register
 /// copies.
 ///
-bool ExpandPostRA::runOnMachineFunction(MachineFunction &MF) {
+bool ExpandPostRA::run(MachineFunction &MF) {
   LLVM_DEBUG(dbgs() << "Machine Function\n"
                     << "********** EXPANDING POST-RA PSEUDO INSTRS **********\n"
                     << "********** Function: " << MF.getName() << '\n');
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index a0fb2bcfbce14..f78c626f95685 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -90,6 +90,7 @@
 #include "llvm/CodeGen/ExpandLargeDivRem.h"
 #include "llvm/CodeGen/ExpandLargeFpConvert.h"
 #include "llvm/CodeGen/ExpandMemCmp.h"
+#include "llvm/CodeGen/ExpandPostRAPseudos.h"
 #include "llvm/CodeGen/FinalizeISel.h"
 #include "llvm/CodeGen/GCMetadata.h"
 #include "llvm/CodeGen/GlobalMerge.h"
diff --git a/llvm/test/CodeGen/AArch64/seqpaircopy.mir b/llvm/test/CodeGen/AArch64/seqpaircopy.mir
index 89511cbf726bd..a3c47232435fa 100644
--- a/llvm/test/CodeGen/AArch64/seqpaircopy.mir
+++ b/llvm/test/CodeGen/AArch64/seqpaircopy.mir
@@ -1,4 +1,5 @@
 # RUN: llc -o - %s -mtriple=aarch64-- -mattr=+v8.1a -run-pass=postrapseudos | FileCheck %s
+# RUN: llc -o - %s -mtriple=aarch64-- -mattr=+v8.1a -passes=post-ra-pseudos | FileCheck %s
 ---
 # CHECK-LABEL: name: copy_xseqpairs
 name: copy_xseqpairs
diff --git a/llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir b/llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
index 94fde7c4733a3..2bd1b8bf3f3f6 100644
--- a/llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
+++ b/llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
@@ -3,6 +3,8 @@
 # RUN: llc -mtriple=amdgcn -mcpu=gfx90a -run-pass postrapseudos -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX90A %s
 # RUN: llc -mtriple=amdgcn -mcpu=gfx942 -run-pass postrapseudos -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX942 %s
 
+# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -passes=post-ra-pseudos -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX942 %s
+
 --- |
     define amdgpu_kernel void @a_to_v() #0 { ret void }
     define amdgpu_kernel void @a2_to_v2() #0 { ret void }
diff --git a/llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir b/llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
index fad2b1b325a48..8a489bd7598b4 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
@@ -1,5 +1,6 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -verify-machineinstrs -mtriple riscv64 -run-pass=postrapseudos %s -o - | FileCheck %s
+# RUN: llc -verify-machineinstrs -mtriple riscv64 -passes=post-ra-pseudos %s -o - | FileCheck %s
 
 ...
 ---
diff --git a/llvm/test/CodeGen/SystemZ/copy-phys-reg-gr64-to-fp64.mir b/llvm/test/CodeGen/SystemZ/copy-phys-reg-gr64-to-fp64.mir
index 07ef93415bb79..d7310ef6b98d3 100644
--- a/llvm/test/CodeGen/SystemZ/copy-phys-reg-gr64-to-fp64.mir
+++ b/llvm/test/CodeGen/SystemZ/copy-phys-reg-gr64-to-fp64.mir
@@ -1,5 +1,6 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
 # RUN: llc -mtriple=s390x-ibm-linux -mcpu=z13 -run-pass=postrapseudos -o - %s | FileCheck %s
+# RUN: llc -mtriple=s390x-ibm-linux -mcpu=z13 -passes=post-ra-pseudos -o - %s | FileCheck %s
 ---
 name:            copy_fp64_to_gr64__f3d_to_r1d
 tracksRegLiveness: true

arsenm
arsenm approved these changes Mar 3, 2025
View reviewed changes
llvm/lib/CodeGen/ExpandPostRAPseudos.cpp Outdated
return PreservedAnalyses::all();

auto PA = getMachineFunctionPassPreservedAnalyses();
PA.preserveSet<CFGAnalyses>();
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Not necessarily true but I'm not aware of any targets making CFG modifications

Base automatically changed from users/optimisan/port-si-mode-register to main March 4, 2025 05:21
@optimisan optimisan force-pushed the users/optimisan/03-03-_codegen_npm_port_expandpostrapseudos_to_npm branch from f3a724f to 6ac51fe Compare March 4, 2025 06:00
@optimisan optimisan merged commit af4ec59 into main Mar 4, 2025
6 of 10 checks passed
@optimisan optimisan deleted the users/optimisan/03-03-_codegen_npm_port_expandpostrapseudos_to_npm branch March 4, 2025 06:19
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llvm-ci commented Mar 4, 2025

LLVM Buildbot has detected a new failure on builder premerge-monolithic-linux running on premerge-linux-1 while building llvm at step 7 "test-build-unified-tree-check-all".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/153/builds/24569

Here is the relevant piece of the build log for the reference 
Step 7 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'AddressSanitizer-x86_64-linux :: TestCases/Posix/halt_on_error-torture.cpp' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
RUN: at line 3: /build/buildbot/premerge-monolithic-linux/build/./bin/clang  --driver-mode=g++ -fsanitize=address -mno-omit-leaf-frame-pointer -fno-omit-frame-pointer -fno-optimize-sibling-calls -gline-tables-only  -m64  -fsanitize-recover=address -pthread /build/buildbot/premerge-monolithic-linux/llvm-project/compiler-rt/test/asan/TestCases/Posix/halt_on_error-torture.cpp -o /build/buildbot/premerge-monolithic-linux/build/runtimes/runtimes-bins/compiler-rt/test/asan/X86_64LinuxConfig/TestCases/Posix/Output/halt_on_error-torture.cpp.tmp
+ /build/buildbot/premerge-monolithic-linux/build/./bin/clang --driver-mode=g++ -fsanitize=address -mno-omit-leaf-frame-pointer -fno-omit-frame-pointer -fno-optimize-sibling-calls -gline-tables-only -m64 -fsanitize-recover=address -pthread /build/buildbot/premerge-monolithic-linux/llvm-project/compiler-rt/test/asan/TestCases/Posix/halt_on_error-torture.cpp -o /build/buildbot/premerge-monolithic-linux/build/runtimes/runtimes-bins/compiler-rt/test/asan/X86_64LinuxConfig/TestCases/Posix/Output/halt_on_error-torture.cpp.tmp
RUN: at line 5: env ASAN_OPTIONS=halt_on_error=false:suppress_equal_pcs=false  /build/buildbot/premerge-monolithic-linux/build/runtimes/runtimes-bins/compiler-rt/test/asan/X86_64LinuxConfig/TestCases/Posix/Output/halt_on_error-torture.cpp.tmp 1 10 >/build/buildbot/premerge-monolithic-linux/build/runtimes/runtimes-bins/compiler-rt/test/asan/X86_64LinuxConfig/TestCases/Posix/Output/halt_on_error-torture.cpp.tmp.log 2>&1
+ env ASAN_OPTIONS=halt_on_error=false:suppress_equal_pcs=false /build/buildbot/premerge-monolithic-linux/build/runtimes/runtimes-bins/compiler-rt/test/asan/X86_64LinuxConfig/TestCases/Posix/Output/halt_on_error-torture.cpp.tmp 1 10
RUN: at line 6: grep 'ERROR: AddressSanitizer: use-after-poison' /build/buildbot/premerge-monolithic-linux/build/runtimes/runtimes-bins/compiler-rt/test/asan/X86_64LinuxConfig/TestCases/Posix/Output/halt_on_error-torture.cpp.tmp.log | count 10
+ grep 'ERROR: AddressSanitizer: use-after-poison' /build/buildbot/premerge-monolithic-linux/build/runtimes/runtimes-bins/compiler-rt/test/asan/X86_64LinuxConfig/TestCases/Posix/Output/halt_on_error-torture.cpp.tmp.log
+ count 10
RUN: at line 7: FileCheck /build/buildbot/premerge-monolithic-linux/llvm-project/compiler-rt/test/asan/TestCases/Posix/halt_on_error-torture.cpp </build/buildbot/premerge-monolithic-linux/build/runtimes/runtimes-bins/compiler-rt/test/asan/X86_64LinuxConfig/TestCases/Posix/Output/halt_on_error-torture.cpp.tmp.log
+ FileCheck /build/buildbot/premerge-monolithic-linux/llvm-project/compiler-rt/test/asan/TestCases/Posix/halt_on_error-torture.cpp
RUN: at line 9: env ASAN_OPTIONS=halt_on_error=false:suppress_equal_pcs=false:exitcode=0  /build/buildbot/premerge-monolithic-linux/build/runtimes/runtimes-bins/compiler-rt/test/asan/X86_64LinuxConfig/TestCases/Posix/Output/halt_on_error-torture.cpp.tmp 10 20 >/build/buildbot/premerge-monolithic-linux/build/runtimes/runtimes-bins/compiler-rt/test/asan/X86_64LinuxConfig/TestCases/Posix/Output/halt_on_error-torture.cpp.tmp.log 2>&1
+ env ASAN_OPTIONS=halt_on_error=false:suppress_equal_pcs=false:exitcode=0 /build/buildbot/premerge-monolithic-linux/build/runtimes/runtimes-bins/compiler-rt/test/asan/X86_64LinuxConfig/TestCases/Posix/Output/halt_on_error-torture.cpp.tmp 10 20
RUN: at line 10: grep 'ERROR: AddressSanitizer: use-after-poison' /build/buildbot/premerge-monolithic-linux/build/runtimes/runtimes-bins/compiler-rt/test/asan/X86_64LinuxConfig/TestCases/Posix/Output/halt_on_error-torture.cpp.tmp.log | count 200
+ grep 'ERROR: AddressSanitizer: use-after-poison' /build/buildbot/premerge-monolithic-linux/build/runtimes/runtimes-bins/compiler-rt/test/asan/X86_64LinuxConfig/TestCases/Posix/Output/halt_on_error-torture.cpp.tmp.log
+ count 200
grep: /build/buildbot/premerge-monolithic-linux/build/runtimes/runtimes-bins/compiler-rt/test/asan/X86_64LinuxConfig/TestCases/Posix/Output/halt_on_error-torture.cpp.tmp.log: binary file matches
Expected 200 lines, got 0.

--

********************

jph-13 pushed a commit to jph-13/llvm-project that referenced this pull request Mar 21, 2025
@optimisan @jph-13
[CodeGen][NPM] Port ExpandPostRAPseudos to NPM (llvm#129509)
42c9fb4
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@arsenm arsenm arsenm approved these changes

@cdevadas cdevadas Awaiting requested review from cdevadas

@vikramRH vikramRH Awaiting requested review from vikramRH

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