IR: Make llvm.fake.use a DefaultAttrsIntrinsic

[arsenm]

This shouldn't be special and is just an ordinary sideeffect.

[arsenm]

• IR: Make llvm.fake.use a DefaultAttrsIntrinsic #131743 👈 (View in Graphite)
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[llvmbot]

@llvm/pr-subscribers-clang
@llvm/pr-subscribers-llvm-ir

@llvm/pr-subscribers-backend-amdgpu

Author: Matt Arsenault (arsenm)

Changes

This shouldn't be special and is just an ordinary sideeffect.

---

Full diff: https://github.com/llvm/llvm-project/pull/131743.diff

2 Files Affected:

• (modified) llvm/include/llvm/IR/Intrinsics.td (+2-1)
• (modified) llvm/test/CodeGen/AMDGPU/lower-kernargs.ll (+2-2)

diff --git a/llvm/include/llvm/IR/Intrinsics.td b/llvm/include/llvm/IR/Intrinsics.td
index 62239ca705b9e..e3049144b132e 100644
--- a/llvm/include/llvm/IR/Intrinsics.td
+++ b/llvm/include/llvm/IR/Intrinsics.td
@@ -1881,7 +1881,8 @@ def int_is_constant : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_any_ty],
                                 "llvm.is.constant">;
 
 // Introduce a use of the argument without generating any code.
-def int_fake_use : Intrinsic<[], [llvm_vararg_ty]>;
+def int_fake_use : DefaultAttrsIntrinsic<[], [llvm_vararg_ty],
+  [IntrHasSideEffects, IntrInaccessibleMemOnly, IntrWillReturn]>;
 
 // Intrinsic to mask out bits of a pointer.
 // First argument must be pointer or vector of pointer. This is checked by the
diff --git a/llvm/test/CodeGen/AMDGPU/lower-kernargs.ll b/llvm/test/CodeGen/AMDGPU/lower-kernargs.ll
index f6ee2090221c5..119beb958f1bd 100644
--- a/llvm/test/CodeGen/AMDGPU/lower-kernargs.ll
+++ b/llvm/test/CodeGen/AMDGPU/lower-kernargs.ll
@@ -1837,13 +1837,13 @@ attributes #2 = { nounwind "target-cpu"="tahiti" }
 !llvm.module.flags = !{!0}
 !0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
 ;.
-; HSA: attributes #[[ATTR0:[0-9]+]] = { nounwind }
+; HSA: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) }
 ; HSA: attributes #[[ATTR1:[0-9]+]] = { nounwind "target-cpu"="kaveri" }
 ; HSA: attributes #[[ATTR2:[0-9]+]] = { nounwind "amdgpu-implicitarg-num-bytes"="40" "target-cpu"="kaveri" }
 ; HSA: attributes #[[ATTR3:[0-9]+]] = { nounwind "target-cpu"="tahiti" }
 ; HSA: attributes #[[ATTR4:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
 ;.
-; MESA: attributes #[[ATTR0:[0-9]+]] = { nounwind }
+; MESA: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) }
 ; MESA: attributes #[[ATTR1:[0-9]+]] = { nounwind "target-cpu"="kaveri" }
 ; MESA: attributes #[[ATTR2:[0-9]+]] = { nounwind "amdgpu-implicitarg-num-bytes"="40" "target-cpu"="kaveri" }
 ; MESA: attributes #[[ATTR3:[0-9]+]] = { nounwind "target-cpu"="tahiti" }

[SLTozer]

Besides the failing test (looks like it's just a matter of the fake.use attribute index shifting in fake-use-determinism.c), this LGTM. Just as a small check for posterity, is there a reason to use IntrInaccessibleMemOnly over IntrNoMem when we've also set IntrHasSideEffects?

[arsenm]

Besides the failing test (looks like it's just a matter of the fake.use attribute index shifting in fake-use-determinism.c), this LGTM. Just as a small check for posterity, is there a reason to use IntrInaccessibleMemOnly over IntrNoMem when we've also set IntrHasSideEffects?

I don't think so, I copied from something else. I'll fix it to IntrNoMem

[SLTozer]

Some minor comments, LGTM once addressed.

[SLTozer]

Do these attributes (and the ones below) need updating with the change to use IntrNoMem?

[arsenm]

Oh right, the IR still doesn't have a representation of "side effects without memory" without memory. This just loses the attribute, and why I left as inaccessiblememonly. I guess I'll put it back

[arsenm]

Merge activity

• Mar 18, 9:27 PM EDT: A user started a stack merge that includes this pull request via Graphite.
• Mar 18, 9:29 PM EDT: A user merged this pull request with Graphite.