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IR: Make llvm.fake.use a DefaultAttrsIntrinsic #131743

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Merged
merged 2 commits into from
Mar 19, 2025
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IR: Make llvm.fake.use a DefaultAttrsIntrinsic #131743

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bb6f2e6
IR: Make llvm.fake.use a DefaultAttrsIntrinsic
arsenm Mar 18, 2025
72f4801
IntrNoMem -> IntrInaccessibleMemOnly
arsenm Mar 19, 2025
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6 changes: 3 additions & 3 deletions clang/test/CodeGen/fake-use-determinism.c
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Expand Up @@ -5,11 +5,11 @@
// but that it remains the same between different test runs.

// CHECK: [[K_FAKE_USE:%[a-zA-Z0-9\.]+]] = load i32, ptr %k.addr
// CHECK-NEXT: call void (...) @llvm.fake.use(i32 [[K_FAKE_USE]]) #2
// CHECK-NEXT: call void (...) @llvm.fake.use(i32 [[K_FAKE_USE]])
// CHECK-NEXT: [[J_FAKE_USE:%[a-zA-Z0-9\.]+]] = load i32, ptr %j.addr
// CHECK-NEXT: call void (...) @llvm.fake.use(i32 [[J_FAKE_USE]]) #2
// CHECK-NEXT: call void (...) @llvm.fake.use(i32 [[J_FAKE_USE]])
// CHECK-NEXT: [[I_FAKE_USE:%[a-zA-Z0-9\.]+]] = load i32, ptr %i.addr
// CHECK-NEXT: call void (...) @llvm.fake.use(i32 [[I_FAKE_USE]]) #2
// CHECK-NEXT: call void (...) @llvm.fake.use(i32 [[I_FAKE_USE]])

void bar();
void foo(int i, int j, int k)
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3 changes: 2 additions & 1 deletion llvm/include/llvm/IR/Intrinsics.td
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Expand Up @@ -1881,7 +1881,8 @@ def int_is_constant : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_any_ty],
"llvm.is.constant">;

// Introduce a use of the argument without generating any code.
def int_fake_use : Intrinsic<[], [llvm_vararg_ty]>;
def int_fake_use : DefaultAttrsIntrinsic<[], [llvm_vararg_ty],
[IntrHasSideEffects, IntrInaccessibleMemOnly, IntrWillReturn]>;

// Intrinsic to mask out bits of a pointer.
// First argument must be pointer or vector of pointer. This is checked by the
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4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AMDGPU/lower-kernargs.ll
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Expand Up @@ -1837,13 +1837,13 @@ attributes #2 = { nounwind "target-cpu"="tahiti" }
!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
;.
; HSA: attributes #[[ATTR0:[0-9]+]] = { nounwind }
; HSA: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) }
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Do these attributes (and the ones below) need updating with the change to use IntrNoMem?

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Oh right, the IR still doesn't have a representation of "side effects without memory" without memory. This just loses the attribute, and why I left as inaccessiblememonly. I guess I'll put it back

; HSA: attributes #[[ATTR1:[0-9]+]] = { nounwind "target-cpu"="kaveri" }
; HSA: attributes #[[ATTR2:[0-9]+]] = { nounwind "amdgpu-implicitarg-num-bytes"="40" "target-cpu"="kaveri" }
; HSA: attributes #[[ATTR3:[0-9]+]] = { nounwind "target-cpu"="tahiti" }
; HSA: attributes #[[ATTR4:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
;.
; MESA: attributes #[[ATTR0:[0-9]+]] = { nounwind }
; MESA: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) }
; MESA: attributes #[[ATTR1:[0-9]+]] = { nounwind "target-cpu"="kaveri" }
; MESA: attributes #[[ATTR2:[0-9]+]] = { nounwind "amdgpu-implicitarg-num-bytes"="40" "target-cpu"="kaveri" }
; MESA: attributes #[[ATTR3:[0-9]+]] = { nounwind "target-cpu"="tahiti" }
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