Skip to content

[AArch64] Use vecshiftL64 instead of vecshiftR64 to match scalar SLI imm. #139904

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
May 15, 2025
Merged

[AArch64] Use vecshiftL64 instead of vecshiftR64 to match scalar SLI imm. #139904

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion llvm/lib/Target/AArch64/AArch64InstrFormats.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -10188,7 +10188,7 @@ multiclass SIMDScalarLShiftDTied<bit U, bits<5> opc, string asm,
def d : BaseSIMDScalarShiftTied<U, opc, {1,?,?,?,?,?,?},
FPR64, FPR64, vecshiftL64, asm,
[(set (v1i64 FPR64:$dst), (OpNode (v1i64 FPR64:$Rd), (v1i64 FPR64:$Rn),
(i32 vecshiftR64:$imm)))]> {
(i32 vecshiftL64:$imm)))]> {
let Inst{21-16} = imm{5-0};
}
}
Expand Down
11 changes: 11 additions & 0 deletions llvm/test/CodeGen/AArch64/arm64-vshift.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -95,6 +95,7 @@
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for sli4h
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for sli2s
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for sli1d
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for sli1d_imm0
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for sli16b
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for sli8h
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for sli4s
Expand Down Expand Up @@ -4088,6 +4089,16 @@ define <1 x i64> @sli1d(ptr %A, ptr %B) nounwind {
ret <1 x i64> %tmp3
}

; Ensure we can select scalar SLI with a zero shift (see issue #139879).
define <1 x i64> @sli1d_imm0(<1 x i64> %a, <1 x i64> %b) {
; CHECK-LABEL: sli1d_imm0:
; CHECK: // %bb.0:
; CHECK-NEXT: sli d0, d1, #0
; CHECK-NEXT: ret
%r = call <1 x i64> @llvm.aarch64.neon.vsli(<1 x i64> %a, <1 x i64> %b, i32 0)
ret <1 x i64> %r
}

define <16 x i8> @sli16b(ptr %A, ptr %B) nounwind {
; CHECK-LABEL: sli16b:
; CHECK: // %bb.0:
Expand Down