Skip to content

Fix attributes of llvm.amdgcn.make.buffer.rsrc #68609

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Oct 10, 2023
Merged

Fix attributes of llvm.amdgcn.make.buffer.rsrc #68609

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
4 changes: 2 additions & 2 deletions llvm/include/llvm/IR/IntrinsicsAMDGPU.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -999,7 +999,7 @@ def int_amdgcn_make_buffer_rsrc : DefaultAttrsIntrinsic <
llvm_i32_ty, // NumRecords / extent
llvm_i32_ty], // flags
// Attributes lifted from ptrmask + some extra argument attributes.
[IntrNoMem, NoCapture<ArgIndex<0>>, ReadNone<ArgIndex<0>>,
[IntrNoMem, ReadNone<ArgIndex<0>>,
IntrSpeculatable, IntrWillReturn]>;

defset list<AMDGPURsrcIntrinsic> AMDGPUBufferIntrinsics = {
Expand Down Expand Up @@ -1928,7 +1928,7 @@ def int_amdgcn_inverse_ballot :
[IntrNoMem, IntrWillReturn, IntrNoCallback, IntrNoFree]>;

class AMDGPUWaveReduce<LLVMType data_ty = llvm_anyint_ty> : Intrinsic<
[data_ty],
[data_ty],
[
LLVMMatchType<0>, // llvm value to reduce (SGPR/VGPR)
llvm_i32_ty // Reduction Strategy Switch for lowering ( 0: Default,
Expand Down