-
Notifications
You must be signed in to change notification settings - Fork 14.3k
[SelectionDAG] Add space-optimized forms of OPC_EmitRegister #73291
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
[SelectionDAG] Add space-optimized forms of OPC_EmitRegister #73291
Conversation
@llvm/pr-subscribers-llvm-selectiondag Author: Wang Pengcheng (wangpc-pp) ChangesThe followed byte of We add Overall this reduces the llc binary size with all in-tree targets by Full diff: https://github.com/llvm/llvm-project/pull/73291.diff 3 Files Affected:
diff --git a/llvm/include/llvm/CodeGen/SelectionDAGISel.h b/llvm/include/llvm/CodeGen/SelectionDAGISel.h
index ffeb4959ba7d076..e05a3e903c28048 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGISel.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGISel.h
@@ -161,6 +161,8 @@ class SelectionDAGISel : public MachineFunctionPass {
OPC_EmitInteger,
OPC_EmitStringInteger,
OPC_EmitRegister,
+ OPC_EmitRegisterI32,
+ OPC_EmitRegisterI64,
OPC_EmitRegister2,
OPC_EmitConvertToTarget,
OPC_EmitMergeInputChains,
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 7d9bebdca127224..a5005d74faffeb7 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -3465,9 +3465,21 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
VT), nullptr));
continue;
}
- case OPC_EmitRegister: {
- MVT::SimpleValueType VT =
- (MVT::SimpleValueType)MatcherTable[MatcherIndex++];
+ case OPC_EmitRegister:
+ case OPC_EmitRegisterI32:
+ case OPC_EmitRegisterI64: {
+ MVT::SimpleValueType VT;
+ switch (Opcode) {
+ case OPC_EmitRegisterI32:
+ VT = MVT::i32;
+ break;
+ case OPC_EmitRegisterI64:
+ VT = MVT::i64;
+ break;
+ default:
+ VT = (MVT::SimpleValueType)MatcherTable[MatcherIndex++];
+ break;
+ }
unsigned RegNo = MatcherTable[MatcherIndex++];
RecordedNodes.push_back(std::pair<SDValue, SDNode*>(
CurDAG->getRegister(RegNo, VT), nullptr));
diff --git a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
index 4a11991036efc11..4f1f4b2512a626c 100644
--- a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
@@ -687,14 +687,26 @@ EmitMatcher(const Matcher *N, const unsigned Indent, unsigned CurrentIdx,
case Matcher::EmitRegister: {
const EmitRegisterMatcher *Matcher = cast<EmitRegisterMatcher>(N);
const CodeGenRegister *Reg = Matcher->getReg();
+ MVT::SimpleValueType VT = Matcher->getVT();
// If the enum value of the register is larger than one byte can handle,
// use EmitRegister2.
if (Reg && Reg->EnumValue > 255) {
- OS << "OPC_EmitRegister2, " << getEnumName(Matcher->getVT()) << ", ";
+ OS << "OPC_EmitRegister2, " << getEnumName(VT) << ", ";
OS << "TARGET_VAL(" << getQualifiedName(Reg->TheDef) << "),\n";
return 4;
} else {
- OS << "OPC_EmitRegister, " << getEnumName(Matcher->getVT()) << ", ";
+ unsigned OpBytes;
+ switch (VT) {
+ case MVT::i32:
+ case MVT::i64:
+ OpBytes = 1;
+ OS << "OPC_EmitRegisterI" << MVT(VT).getScalarSizeInBits() << ", ";
+ break;
+ default:
+ OpBytes = 2;
+ OS << "OPC_EmitRegister, " << getEnumName(VT) << ", ";
+ break;
+ }
if (Reg) {
OS << getQualifiedName(Reg->TheDef) << ",\n";
} else {
@@ -703,7 +715,7 @@ EmitMatcher(const Matcher *N, const unsigned Indent, unsigned CurrentIdx,
OS << "/*zero_reg*/";
OS << ",\n";
}
- return 3;
+ return OpBytes + 1;
}
}
|
✅ With the latest revision this PR passed the C/C++ code formatter. |
4929a5d
to
a4d0c6f
Compare
Ping. |
a4d0c6f
to
9216f54
Compare
Ping. |
The followed byte of `OPC_EmitRegister` is a MVT type, which is usually i32 or i64. We add `OPC_EmitRegisterI32` and `OPC_EmitRegisterI64` so that we can reduce one byte. Overall this reduces the llc binary size with all in-tree targets by about 10K.
9216f54
to
b3a726e
Compare
The followed byte of
OPC_EmitRegister
is a MVT type, which isusually i32 or i64.
We add
OPC_EmitRegisterI32
andOPC_EmitRegisterI64
so that wecan reduce one byte.
Overall this reduces the llc binary size with all in-tree targets by
about 10K.