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[SelectionDAG] Add space-optimized forms of OPC_EmitRegister #73291

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Merged
merged 1 commit into from
Dec 19, 2023
Merged

[SelectionDAG] Add space-optimized forms of OPC_EmitRegister #73291

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2 changes: 2 additions & 0 deletions llvm/include/llvm/CodeGen/SelectionDAGISel.h
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Original file line number Diff line number Diff line change
Expand Up @@ -223,6 +223,8 @@ class SelectionDAGISel : public MachineFunctionPass {
// Space-optimized forms that implicitly encode integer VT.
OPC_EmitStringInteger32,
OPC_EmitRegister,
OPC_EmitRegisterI32,
OPC_EmitRegisterI64,
OPC_EmitRegister2,
OPC_EmitConvertToTarget,
OPC_EmitConvertToTarget0,
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22 changes: 17 additions & 5 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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Expand Up @@ -3612,12 +3612,24 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
CurDAG->getTargetConstant(Val, SDLoc(NodeToMatch), VT), nullptr));
continue;
}
case OPC_EmitRegister: {
MVT::SimpleValueType VT =
static_cast<MVT::SimpleValueType>(MatcherTable[MatcherIndex++]);
case OPC_EmitRegister:
case OPC_EmitRegisterI32:
case OPC_EmitRegisterI64: {
MVT::SimpleValueType VT;
switch (Opcode) {
case OPC_EmitRegisterI32:
VT = MVT::i32;
break;
case OPC_EmitRegisterI64:
VT = MVT::i64;
break;
default:
VT = static_cast<MVT::SimpleValueType>(MatcherTable[MatcherIndex++]);
break;
}
unsigned RegNo = MatcherTable[MatcherIndex++];
RecordedNodes.push_back(std::pair<SDValue, SDNode*>(
CurDAG->getRegister(RegNo, VT), nullptr));
RecordedNodes.push_back(std::pair<SDValue, SDNode *>(
CurDAG->getRegister(RegNo, VT), nullptr));
continue;
}
case OPC_EmitRegister2: {
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33 changes: 22 additions & 11 deletions llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
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Expand Up @@ -737,24 +737,35 @@ EmitMatcher(const Matcher *N, const unsigned Indent, unsigned CurrentIdx,
case Matcher::EmitRegister: {
const EmitRegisterMatcher *Matcher = cast<EmitRegisterMatcher>(N);
const CodeGenRegister *Reg = Matcher->getReg();
MVT::SimpleValueType VT = Matcher->getVT();
// If the enum value of the register is larger than one byte can handle,
// use EmitRegister2.
if (Reg && Reg->EnumValue > 255) {
OS << "OPC_EmitRegister2, " << getEnumName(Matcher->getVT()) << ", ";
OS << "OPC_EmitRegister2, " << getEnumName(VT) << ", ";
OS << "TARGET_VAL(" << getQualifiedName(Reg->TheDef) << "),\n";
return 4;
}
unsigned OpBytes;
switch (VT) {
case MVT::i32:
case MVT::i64:
OpBytes = 1;
OS << "OPC_EmitRegisterI" << MVT(VT).getSizeInBits() << ", ";
break;
default:
OpBytes = 2;
OS << "OPC_EmitRegister, " << getEnumName(VT) << ", ";
break;
}
if (Reg) {
OS << getQualifiedName(Reg->TheDef) << ",\n";
} else {
OS << "OPC_EmitRegister, " << getEnumName(Matcher->getVT()) << ", ";
if (Reg) {
OS << getQualifiedName(Reg->TheDef) << ",\n";
} else {
OS << "0 ";
if (!OmitComments)
OS << "/*zero_reg*/";
OS << ",\n";
}
return 3;
OS << "0 ";
if (!OmitComments)
OS << "/*zero_reg*/";
OS << ",\n";
}
return OpBytes + 1;
}

case Matcher::EmitConvertToTarget: {
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