[clang][RISCV] Reorder sema check for RVV type

[4vtomat]

Currently using the command clang -cc1 -triple riscv64 to compile the
code below:

#include <riscv_vector.h>
void foo() {
  vfloat64m1_t f64m1;
}

would get the error message "RISC-V type 'vfloat64m1_t' ... requires the 'zve64x' extension"
which is supposed to be "RISC-V type 'vfloat64m1_t' ... requires the 'zve64d' extension".

[llvmbot]

@llvm/pr-subscribers-backend-risc-v

@llvm/pr-subscribers-clang

Author: Brandon Wu (4vtomat)

Changes

Currently using the command clang -cc1 -triple riscv64 to compile the
code below:

#include <riscv_vector.h>
void foo() {
  vfloat64m1_t f64m1;
}

would get the error message "RISC-V type 'vfloat64m1_t' ... requires the 'zve64x' extension"
which is supposed to be "RISC-V type 'vfloat64m1_t' ... requires the 'zve64d' extension".

---

Full diff: https://github.com/llvm/llvm-project/pull/83553.diff

1 Files Affected:

• (modified) clang/lib/Sema/SemaChecking.cpp (+4-4)

diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index 979b63884359fc..27ed6f2da05254 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -6332,9 +6332,12 @@ void Sema::checkRVVTypeSupport(QualType Ty, SourceLocation Loc, Decl *D) {
   unsigned EltSize = Context.getTypeSize(Info.ElementType);
   unsigned MinElts = Info.EC.getKnownMinValue();
 
+  if (Info.ElementType->isSpecificBuiltinType(BuiltinType::Double) &&
+           !TI.hasFeature("zve64d"))
+    Diag(Loc, diag::err_riscv_type_requires_extension, D) << Ty << "zve64d";
   // (ELEN, LMUL) pairs of (8, mf8), (16, mf4), (32, mf2), (64, m1) requires at
   // least zve64x
-  if (((EltSize == 64 && Info.ElementType->isIntegerType()) || MinElts == 1) &&
+  else if (((EltSize == 64 && Info.ElementType->isIntegerType()) || MinElts == 1) &&
       !TI.hasFeature("zve64x"))
     Diag(Loc, diag::err_riscv_type_requires_extension, D) << Ty << "zve64x";
   else if (Info.ElementType->isFloat16Type() && !TI.hasFeature("zvfh") &&
@@ -6347,9 +6350,6 @@ void Sema::checkRVVTypeSupport(QualType Ty, SourceLocation Loc, Decl *D) {
   else if (Info.ElementType->isSpecificBuiltinType(BuiltinType::Float) &&
            !TI.hasFeature("zve32f"))
     Diag(Loc, diag::err_riscv_type_requires_extension, D) << Ty << "zve32f";
-  else if (Info.ElementType->isSpecificBuiltinType(BuiltinType::Double) &&
-           !TI.hasFeature("zve64d"))
-    Diag(Loc, diag::err_riscv_type_requires_extension, D) << Ty << "zve64d";
   // Given that caller already checked isRVVType() before calling this function,
   // if we don't have at least zve32x supported, then we need to emit error.
   else if (!TI.hasFeature("zve32x"))

[github-actions]

✅ With the latest revision this PR passed the C/C++ code formatter.

[kito-cheng]

Could you add a testcase?

[4vtomat]

Maybe we can modify the current test case, it would get the error message "RISC-V type 'vfloat64m1_t' ... requires the 'zve64x' extension", but should be 'zve64d' instead.

[topperc]

LGTM

[topperc]

I missed Kito's comment about the test

[4vtomat]

I missed Kito's comment about the test

I guess clang/test/Sema/riscv-vector-float64-check.c is sufficient since I've modified it to have only zve32x feature. If you use current llvm to run the test, it would fail.

[topperc]

LGTM