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[RISCV] Move matchRegisterNameHelper into the RISCVAsmParser and remove IsRVE argument. NFC #85172
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…ve IsRVE argument. NFC With it in the class we can use isRVE() inside the function instead of making the callers do it.
@llvm/pr-subscribers-backend-risc-v Author: Craig Topper (topperc) ChangesWith it in the class we can use isRVE() inside the function instead of making the callers do it. Full diff: https://github.com/llvm/llvm-project/pull/85172.diff 1 Files Affected:
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index 2da75bda8d1263..a78e89d9eb7a88 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -107,6 +107,7 @@ class RISCVAsmParser : public MCTargetAsmParser {
uint64_t &ErrorInfo,
bool MatchingInlineAsm) override;
+ MCRegister matchRegisterNameHelper(StringRef Name) const;
bool parseRegister(MCRegister &Reg, SMLoc &StartLoc, SMLoc &EndLoc) override;
ParseStatus tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
SMLoc &EndLoc) override;
@@ -1630,7 +1631,7 @@ bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
// alternative ABI names), setting RegNo to the matching register. Upon
// failure, returns a non-valid MCRegister. If IsRVE, then registers x16-x31
// will be rejected.
-static MCRegister matchRegisterNameHelper(bool IsRVE, StringRef Name) {
+MCRegister RISCVAsmParser::matchRegisterNameHelper(StringRef Name) const {
MCRegister Reg = MatchRegisterName(Name);
// The 16-/32- and 64-bit FPRs have the same asm name. Check that the initial
// match always matches the 64-bit variant, and not the 16/32-bit one.
@@ -1641,7 +1642,7 @@ static MCRegister matchRegisterNameHelper(bool IsRVE, StringRef Name) {
static_assert(RISCV::F0_D < RISCV::F0_F, "FPR matching must be updated");
if (!Reg)
Reg = MatchRegisterAltName(Name);
- if (IsRVE && Reg >= RISCV::X16 && Reg <= RISCV::X31)
+ if (isRVE() && Reg >= RISCV::X16 && Reg <= RISCV::X31)
Reg = RISCV::NoRegister;
return Reg;
}
@@ -1660,7 +1661,7 @@ ParseStatus RISCVAsmParser::tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
EndLoc = Tok.getEndLoc();
StringRef Name = getLexer().getTok().getIdentifier();
- Reg = matchRegisterNameHelper(isRVE(), Name);
+ Reg = matchRegisterNameHelper(Name);
if (!Reg)
return ParseStatus::NoMatch;
@@ -1693,7 +1694,7 @@ ParseStatus RISCVAsmParser::parseRegister(OperandVector &Operands,
return ParseStatus::NoMatch;
case AsmToken::Identifier:
StringRef Name = getLexer().getTok().getIdentifier();
- MCRegister RegNo = matchRegisterNameHelper(isRVE(), Name);
+ MCRegister RegNo = matchRegisterNameHelper(Name);
if (!RegNo) {
if (HadParens)
@@ -2232,7 +2233,7 @@ ParseStatus RISCVAsmParser::parseMaskReg(OperandVector &Operands) {
StringRef Name = getLexer().getTok().getIdentifier();
if (!Name.consume_back(".t"))
return Error(getLoc(), "expected '.t' suffix");
- MCRegister RegNo = matchRegisterNameHelper(isRVE(), Name);
+ MCRegister RegNo = matchRegisterNameHelper(Name);
if (!RegNo)
return ParseStatus::NoMatch;
@@ -2250,7 +2251,7 @@ ParseStatus RISCVAsmParser::parseGPRAsFPR(OperandVector &Operands) {
return ParseStatus::NoMatch;
StringRef Name = getLexer().getTok().getIdentifier();
- MCRegister RegNo = matchRegisterNameHelper(isRVE(), Name);
+ MCRegister RegNo = matchRegisterNameHelper(Name);
if (!RegNo)
return ParseStatus::NoMatch;
@@ -2281,7 +2282,7 @@ ParseStatus RISCVAsmParser::parseGPRPair(OperandVector &Operands,
return ParseStatus::NoMatch;
StringRef Name = getLexer().getTok().getIdentifier();
- MCRegister RegNo = matchRegisterNameHelper(isRVE(), Name);
+ MCRegister RegNo = matchRegisterNameHelper(Name);
if (!RegNo)
return ParseStatus::NoMatch;
@@ -2461,7 +2462,7 @@ ParseStatus RISCVAsmParser::parseRegReg(OperandVector &Operands) {
return ParseStatus::NoMatch;
StringRef RegName = getLexer().getTok().getIdentifier();
- MCRegister Reg = matchRegisterNameHelper(isRVE(), RegName);
+ MCRegister Reg = matchRegisterNameHelper(RegName);
if (!Reg)
return Error(getLoc(), "invalid register");
getLexer().Lex();
@@ -2473,7 +2474,7 @@ ParseStatus RISCVAsmParser::parseRegReg(OperandVector &Operands) {
return Error(getLoc(), "expected register");
StringRef Reg2Name = getLexer().getTok().getIdentifier();
- MCRegister Reg2 = matchRegisterNameHelper(isRVE(), Reg2Name);
+ MCRegister Reg2 = matchRegisterNameHelper(Reg2Name);
if (!Reg2)
return Error(getLoc(), "invalid register");
getLexer().Lex();
@@ -2500,7 +2501,7 @@ ParseStatus RISCVAsmParser::parseReglist(OperandVector &Operands) {
return Error(getLoc(), "register list must start from 'ra' or 'x1'");
StringRef RegName = getLexer().getTok().getIdentifier();
- MCRegister RegStart = matchRegisterNameHelper(IsEABI, RegName);
+ MCRegister RegStart = matchRegisterNameHelper(RegName);
MCRegister RegEnd;
if (RegStart != RISCV::X1)
return Error(getLoc(), "register list must start from 'ra' or 'x1'");
@@ -2511,7 +2512,7 @@ ParseStatus RISCVAsmParser::parseReglist(OperandVector &Operands) {
if (getLexer().isNot(AsmToken::Identifier))
return Error(getLoc(), "invalid register");
StringRef RegName = getLexer().getTok().getIdentifier();
- RegStart = matchRegisterNameHelper(IsEABI, RegName);
+ RegStart = matchRegisterNameHelper(RegName);
if (!RegStart)
return Error(getLoc(), "invalid register");
if (RegStart != RISCV::X8)
@@ -2524,7 +2525,7 @@ ParseStatus RISCVAsmParser::parseReglist(OperandVector &Operands) {
if (parseOptionalToken(AsmToken::Minus)) {
StringRef EndName = getLexer().getTok().getIdentifier();
// FIXME: the register mapping and checks of EABI is wrong
- RegEnd = matchRegisterNameHelper(IsEABI, EndName);
+ RegEnd = matchRegisterNameHelper(EndName);
if (!RegEnd)
return Error(getLoc(), "invalid register");
if (IsEABI && RegEnd != RISCV::X9)
|
wangpc-pp
approved these changes
Mar 14, 2024
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LGTM. Thanks!
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With it in the class we can use isRVE() inside the function instead of making the callers do it.