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[GISel][RISCV] Legalize G_FREM to use fmod
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130 changes: 130 additions & 0 deletions
130
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-frem-rv32.mir
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,130 @@ | ||
| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5 | ||
| # RUN: llc -mtriple=riscv32 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck %s | ||
| --- | ||
| name: frem_f32 | ||
| body: | | ||
| bb.1.entry: | ||
| liveins: $x10, $x11 | ||
|
|
||
| ; CHECK-LABEL: name: frem_f32 | ||
| ; CHECK: liveins: $x10, $x11 | ||
| ; CHECK-NEXT: {{ $}} | ||
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 | ||
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 | ||
| ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: $x10 = COPY [[COPY]](s32) | ||
| ; CHECK-NEXT: $x11 = COPY [[COPY1]](s32) | ||
| ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmodf, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 | ||
| ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10 | ||
| ; CHECK-NEXT: $x10 = COPY [[COPY2]](s32) | ||
| ; CHECK-NEXT: PseudoRET implicit $x10 | ||
| %0:_(s32) = COPY $x10 | ||
| %1:_(s32) = COPY $x11 | ||
| %2:_(s32) = G_FREM %0, %1 | ||
| $x10 = COPY %2(s32) | ||
| PseudoRET implicit $x10 | ||
|
|
||
| ... | ||
| --- | ||
| name: frem_f64 | ||
| body: | | ||
| bb.1.entry: | ||
| liveins: $x10, $x11, $x12, $x13 | ||
|
|
||
| ; CHECK-LABEL: name: frem_f64 | ||
| ; CHECK: liveins: $x10, $x11, $x12, $x13 | ||
| ; CHECK-NEXT: {{ $}} | ||
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 | ||
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 | ||
| ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12 | ||
| ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x13 | ||
| ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: $x10 = COPY [[COPY]](s32) | ||
| ; CHECK-NEXT: $x11 = COPY [[COPY1]](s32) | ||
| ; CHECK-NEXT: $x12 = COPY [[COPY2]](s32) | ||
| ; CHECK-NEXT: $x13 = COPY [[COPY3]](s32) | ||
| ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmod, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11 | ||
| ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $x10 | ||
| ; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $x11 | ||
| ; CHECK-NEXT: $x10 = COPY [[COPY4]](s32) | ||
| ; CHECK-NEXT: $x11 = COPY [[COPY5]](s32) | ||
| ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11 | ||
| %2:_(s32) = COPY $x10 | ||
| %3:_(s32) = COPY $x11 | ||
| %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32) | ||
| %4:_(s32) = COPY $x12 | ||
| %5:_(s32) = COPY $x13 | ||
| %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32) | ||
| %6:_(s64) = G_FREM %0, %1 | ||
| %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64) | ||
| $x10 = COPY %7(s32) | ||
| $x11 = COPY %8(s32) | ||
| PseudoRET implicit $x10, implicit $x11 | ||
|
|
||
| ... | ||
| --- | ||
| name: frem_f16 | ||
| body: | | ||
| bb.0.entry: | ||
|
|
||
| ; CHECK-LABEL: name: frem_f16 | ||
| ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 | ||
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 | ||
| ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) | ||
| ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) | ||
| ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16) | ||
| ; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC1]](s16) | ||
| ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: $x10 = COPY [[FPEXT]](s32) | ||
| ; CHECK-NEXT: $x11 = COPY [[FPEXT1]](s32) | ||
| ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmodf, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 | ||
| ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10 | ||
| ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[COPY2]](s32) | ||
| ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16) | ||
| ; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s32) | ||
| ; CHECK-NEXT: PseudoRET implicit $x10 | ||
| %0:_(s32) = COPY $x10 | ||
| %1:_(s32) = COPY $x11 | ||
| %2:_(s16) = G_TRUNC %0(s32) | ||
| %3:_(s16) = G_TRUNC %1(s32) | ||
| %4:_(s16) = G_FREM %2, %3 | ||
| %5:_(s32) = G_ANYEXT %4(s16) | ||
| $x10 = COPY %5(s32) | ||
| PseudoRET implicit $x10 | ||
|
|
||
| ... | ||
| --- | ||
| name: frem_v2f32 | ||
| body: | | ||
| bb.0.entry: | ||
|
|
||
| ; CHECK-LABEL: name: frem_v2f32 | ||
| ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $v8 | ||
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $v9 | ||
| ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) | ||
| ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) | ||
| ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: $x10 = COPY [[UV]](s32) | ||
| ; CHECK-NEXT: $x11 = COPY [[UV2]](s32) | ||
| ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmodf, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 | ||
| ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10 | ||
| ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: $x10 = COPY [[UV1]](s32) | ||
| ; CHECK-NEXT: $x11 = COPY [[UV3]](s32) | ||
| ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmodf, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 | ||
| ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x10 | ||
| ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY2]](s32), [[COPY3]](s32) | ||
| ; CHECK-NEXT: $v8 = COPY [[BUILD_VECTOR]](<2 x s32>) | ||
| ; CHECK-NEXT: PseudoRET implicit $v8 | ||
| %0:_(<2 x s32>) = COPY $v8 | ||
| %1:_(<2 x s32>) = COPY $v9 | ||
| %2:_(<2 x s32>) = G_FREM %0, %1 | ||
| $v8 = COPY %2(<2 x s32>) | ||
| PseudoRET implicit $v8 | ||
|
|
||
| ... |
130 changes: 130 additions & 0 deletions
130
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-frem-rv64.mir
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,130 @@ | ||
| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5 | ||
| # RUN: llc -mtriple=riscv64 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck %s | ||
| --- | ||
| name: frem_f32 | ||
| body: | | ||
| bb.1.entry: | ||
| liveins: $x10, $x11 | ||
|
|
||
| ; CHECK-LABEL: name: frem_f32 | ||
| ; CHECK: liveins: $x10, $x11 | ||
| ; CHECK-NEXT: {{ $}} | ||
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 | ||
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 | ||
| ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: $x10 = COPY [[COPY]](s64) | ||
| ; CHECK-NEXT: $x11 = COPY [[COPY1]](s64) | ||
| ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmodf, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 | ||
| ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10 | ||
| ; CHECK-NEXT: $x10 = COPY [[COPY2]](s64) | ||
| ; CHECK-NEXT: PseudoRET implicit $x10 | ||
| %2:_(s64) = COPY $x10 | ||
| %0:_(s32) = G_TRUNC %2(s64) | ||
| %3:_(s64) = COPY $x11 | ||
| %1:_(s32) = G_TRUNC %3(s64) | ||
| %4:_(s32) = G_FREM %0, %1 | ||
| %5:_(s64) = G_ANYEXT %4(s32) | ||
| $x10 = COPY %5(s64) | ||
| PseudoRET implicit $x10 | ||
|
|
||
| ... | ||
| --- | ||
| name: frem_f64 | ||
| body: | | ||
| bb.1.entry: | ||
| liveins: $x10, $x11 | ||
|
|
||
| ; CHECK-LABEL: name: frem_f64 | ||
| ; CHECK: liveins: $x10, $x11 | ||
| ; CHECK-NEXT: {{ $}} | ||
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 | ||
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 | ||
| ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: $x10 = COPY [[COPY]](s64) | ||
| ; CHECK-NEXT: $x11 = COPY [[COPY1]](s64) | ||
| ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmod, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 | ||
| ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10 | ||
| ; CHECK-NEXT: $x10 = COPY [[COPY2]](s64) | ||
| ; CHECK-NEXT: PseudoRET implicit $x10 | ||
| %0:_(s64) = COPY $x10 | ||
| %1:_(s64) = COPY $x11 | ||
| %2:_(s64) = G_FREM %0, %1 | ||
| $x10 = COPY %2(s64) | ||
| PseudoRET implicit $x10 | ||
|
|
||
| ... | ||
| --- | ||
| name: frem_f16 | ||
| body: | | ||
| bb.0.entry: | ||
|
|
||
| ; CHECK-LABEL: name: frem_f16 | ||
| ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 | ||
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 | ||
| ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s64) | ||
| ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s64) | ||
| ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16) | ||
| ; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC1]](s16) | ||
| ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[FPEXT]](s32) | ||
| ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[FPEXT1]](s32) | ||
| ; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64) | ||
| ; CHECK-NEXT: $x11 = COPY [[ANYEXT1]](s64) | ||
| ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmodf, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 | ||
| ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10 | ||
| ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY2]](s64) | ||
| ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[TRUNC2]](s32) | ||
| ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s64) = G_ANYEXT [[FPTRUNC]](s16) | ||
| ; CHECK-NEXT: $x10 = COPY [[ANYEXT2]](s64) | ||
| ; CHECK-NEXT: PseudoRET implicit $x10 | ||
| %0:_(s64) = COPY $x10 | ||
| %1:_(s64) = COPY $x11 | ||
| %2:_(s16) = G_TRUNC %0(s64) | ||
| %3:_(s16) = G_TRUNC %1(s64) | ||
| %4:_(s16) = G_FREM %2, %3 | ||
| %5:_(s64) = G_ANYEXT %4(s16) | ||
| $x10 = COPY %5(s64) | ||
| PseudoRET implicit $x10 | ||
|
|
||
| ... | ||
| --- | ||
| name: frem_v2f32 | ||
| body: | | ||
| bb.0.entry: | ||
|
|
||
| ; CHECK-LABEL: name: frem_v2f32 | ||
| ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $v8 | ||
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $v9 | ||
| ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) | ||
| ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) | ||
| ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UV]](s32) | ||
| ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[UV2]](s32) | ||
| ; CHECK-NEXT: $x10 = COPY [[ANYEXT]](s64) | ||
| ; CHECK-NEXT: $x11 = COPY [[ANYEXT1]](s64) | ||
| ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmodf, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 | ||
| ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10 | ||
| ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY2]](s64) | ||
| ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s64) = G_ANYEXT [[UV1]](s32) | ||
| ; CHECK-NEXT: [[ANYEXT3:%[0-9]+]]:_(s64) = G_ANYEXT [[UV3]](s32) | ||
| ; CHECK-NEXT: $x10 = COPY [[ANYEXT2]](s64) | ||
| ; CHECK-NEXT: $x11 = COPY [[ANYEXT3]](s64) | ||
| ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &fmodf, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10 | ||
| ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2 | ||
| ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x10 | ||
| ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY3]](s64) | ||
| ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[TRUNC]](s32), [[TRUNC1]](s32) | ||
| ; CHECK-NEXT: $v8 = COPY [[BUILD_VECTOR]](<2 x s32>) | ||
| ; CHECK-NEXT: PseudoRET implicit $v8 | ||
| %0:_(<2 x s32>) = COPY $v8 | ||
| %1:_(<2 x s32>) = COPY $v9 | ||
| %2:_(<2 x s32>) = G_FREM %0, %1 | ||
| $v8 = COPY %2(<2 x s32>) | ||
| PseudoRET implicit $v8 | ||
|
|
||
| ... |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,51 @@ | ||
| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 | ||
| ; RUN: llc -mtriple=riscv32 -global-isel -verify-machineinstrs < %s \ | ||
| ; RUN: | FileCheck %s --check-prefix=RV32 | ||
| ; RUN: llc -mtriple=riscv64 -global-isel -verify-machineinstrs < %s \ | ||
| ; RUN: | FileCheck %s --check-prefix=RV64 | ||
|
|
||
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|
||
| define float @test_f32(float %x, float %y) nounwind { | ||
| ; RV32-LABEL: test_f32: | ||
| ; RV32: # %bb.0: # %entry | ||
| ; RV32-NEXT: addi sp, sp, -16 | ||
| ; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill | ||
| ; RV32-NEXT: call fmodf | ||
| ; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload | ||
| ; RV32-NEXT: addi sp, sp, 16 | ||
| ; RV32-NEXT: ret | ||
| ; | ||
| ; RV64-LABEL: test_f32: | ||
| ; RV64: # %bb.0: # %entry | ||
| ; RV64-NEXT: addi sp, sp, -16 | ||
| ; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill | ||
| ; RV64-NEXT: call fmodf | ||
| ; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload | ||
| ; RV64-NEXT: addi sp, sp, 16 | ||
| ; RV64-NEXT: ret | ||
| entry: | ||
| %z = frem float %x, %y | ||
| ret float %z | ||
| } | ||
|
|
||
| define double @test_f64(double %x, double %y) nounwind { | ||
| ; RV32-LABEL: test_f64: | ||
| ; RV32: # %bb.0: # %entry | ||
| ; RV32-NEXT: addi sp, sp, -16 | ||
| ; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill | ||
| ; RV32-NEXT: call fmod | ||
| ; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload | ||
| ; RV32-NEXT: addi sp, sp, 16 | ||
| ; RV32-NEXT: ret | ||
| ; | ||
| ; RV64-LABEL: test_f64: | ||
| ; RV64: # %bb.0: # %entry | ||
| ; RV64-NEXT: addi sp, sp, -16 | ||
| ; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill | ||
| ; RV64-NEXT: call fmod | ||
| ; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload | ||
| ; RV64-NEXT: addi sp, sp, 16 | ||
| ; RV64-NEXT: ret | ||
| entry: | ||
| %z = frem double %x, %y | ||
| ret double %z | ||
| } | ||
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